1#[doc = "Register `USBPHY_DIRECT` reader"]
2pub type R = crate::R<USBPHY_DIRECT_SPEC>;
3#[doc = "Register `USBPHY_DIRECT` writer"]
4pub type W = crate::W<USBPHY_DIRECT_SPEC>;
5#[doc = "Field `DP_PULLUP_HISEL` reader - Enable the second DP pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2"]
6pub type DP_PULLUP_HISEL_R = crate::BitReader;
7#[doc = "Field `DP_PULLUP_HISEL` writer - Enable the second DP pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2"]
8pub type DP_PULLUP_HISEL_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DP_PULLUP_EN` reader - DP pull up enable"]
10pub type DP_PULLUP_EN_R = crate::BitReader;
11#[doc = "Field `DP_PULLUP_EN` writer - DP pull up enable"]
12pub type DP_PULLUP_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `DP_PULLDN_EN` reader - DP pull down enable"]
14pub type DP_PULLDN_EN_R = crate::BitReader;
15#[doc = "Field `DP_PULLDN_EN` writer - DP pull down enable"]
16pub type DP_PULLDN_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `DM_PULLUP_HISEL` reader - Enable the second DM pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2"]
18pub type DM_PULLUP_HISEL_R = crate::BitReader;
19#[doc = "Field `DM_PULLUP_HISEL` writer - Enable the second DM pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2"]
20pub type DM_PULLUP_HISEL_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `DM_PULLUP_EN` reader - DM pull up enable"]
22pub type DM_PULLUP_EN_R = crate::BitReader;
23#[doc = "Field `DM_PULLUP_EN` writer - DM pull up enable"]
24pub type DM_PULLUP_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `DM_PULLDN_EN` reader - DM pull down enable"]
26pub type DM_PULLDN_EN_R = crate::BitReader;
27#[doc = "Field `DM_PULLDN_EN` writer - DM pull down enable"]
28pub type DM_PULLDN_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `TX_DP_OE` reader - Output enable. If TX_DIFFMODE=1, OE for DPP/DPM diff pair. 0 - DPP/DPM in Hi-Z state; 1 - DPP/DPM driving
30 If TX_DIFFMODE=0, OE for DPP only. 0 - DPP in Hi-Z state; 1 - DPP driving"]
31pub type TX_DP_OE_R = crate::BitReader;
32#[doc = "Field `TX_DP_OE` writer - Output enable. If TX_DIFFMODE=1, OE for DPP/DPM diff pair. 0 - DPP/DPM in Hi-Z state; 1 - DPP/DPM driving
33 If TX_DIFFMODE=0, OE for DPP only. 0 - DPP in Hi-Z state; 1 - DPP driving"]
34pub type TX_DP_OE_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `TX_DM_OE` reader - Output enable. If TX_DIFFMODE=1, Ignored.
36 If TX_DIFFMODE=0, OE for DPM only. 0 - DPM in Hi-Z state; 1 - DPM driving"]
37pub type TX_DM_OE_R = crate::BitReader;
38#[doc = "Field `TX_DM_OE` writer - Output enable. If TX_DIFFMODE=1, Ignored.
39 If TX_DIFFMODE=0, OE for DPM only. 0 - DPM in Hi-Z state; 1 - DPM driving"]
40pub type TX_DM_OE_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `TX_DP` reader - Output data. If TX_DIFFMODE=1, Drives DPP/DPM diff pair. TX_DP_OE=1 to enable drive. DPP=TX_DP, DPM=~TX_DP
42 If TX_DIFFMODE=0, Drives DPP only. TX_DP_OE=1 to enable drive. DPP=TX_DP"]
43pub type TX_DP_R = crate::BitReader;
44#[doc = "Field `TX_DP` writer - Output data. If TX_DIFFMODE=1, Drives DPP/DPM diff pair. TX_DP_OE=1 to enable drive. DPP=TX_DP, DPM=~TX_DP
45 If TX_DIFFMODE=0, Drives DPP only. TX_DP_OE=1 to enable drive. DPP=TX_DP"]
46pub type TX_DP_W<'a, REG> = crate::BitWriter<'a, REG>;
47#[doc = "Field `TX_DM` reader - Output data. TX_DIFFMODE=1, Ignored
48 TX_DIFFMODE=0, Drives DPM only. TX_DM_OE=1 to enable drive. DPM=TX_DM"]
49pub type TX_DM_R = crate::BitReader;
50#[doc = "Field `TX_DM` writer - Output data. TX_DIFFMODE=1, Ignored
51 TX_DIFFMODE=0, Drives DPM only. TX_DM_OE=1 to enable drive. DPM=TX_DM"]
52pub type TX_DM_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `RX_PD` reader - RX power down override (if override enable is set). 1 = powered down."]
54pub type RX_PD_R = crate::BitReader;
55#[doc = "Field `RX_PD` writer - RX power down override (if override enable is set). 1 = powered down."]
56pub type RX_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `TX_PD` reader - TX power down override (if override enable is set). 1 = powered down."]
58pub type TX_PD_R = crate::BitReader;
59#[doc = "Field `TX_PD` writer - TX power down override (if override enable is set). 1 = powered down."]
60pub type TX_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `TX_FSSLEW` reader - TX_FSSLEW=0: Low speed slew rate
62 TX_FSSLEW=1: Full speed slew rate"]
63pub type TX_FSSLEW_R = crate::BitReader;
64#[doc = "Field `TX_FSSLEW` writer - TX_FSSLEW=0: Low speed slew rate
65 TX_FSSLEW=1: Full speed slew rate"]
66pub type TX_FSSLEW_W<'a, REG> = crate::BitWriter<'a, REG>;
67#[doc = "Field `TX_DIFFMODE` reader - TX_DIFFMODE=0: Single ended mode
68 TX_DIFFMODE=1: Differential drive mode (TX_DM, TX_DM_OE ignored)"]
69pub type TX_DIFFMODE_R = crate::BitReader;
70#[doc = "Field `TX_DIFFMODE` writer - TX_DIFFMODE=0: Single ended mode
71 TX_DIFFMODE=1: Differential drive mode (TX_DM, TX_DM_OE ignored)"]
72pub type TX_DIFFMODE_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `RX_DD` reader - Differential RX"]
74pub type RX_DD_R = crate::BitReader;
75#[doc = "Field `RX_DP` reader - DPP pin state"]
76pub type RX_DP_R = crate::BitReader;
77#[doc = "Field `RX_DM` reader - DPM pin state"]
78pub type RX_DM_R = crate::BitReader;
79#[doc = "Field `DP_OVCN` reader - DP overcurrent"]
80pub type DP_OVCN_R = crate::BitReader;
81#[doc = "Field `DM_OVCN` reader - DM overcurrent"]
82pub type DM_OVCN_R = crate::BitReader;
83#[doc = "Field `DP_OVV` reader - DP over voltage"]
84pub type DP_OVV_R = crate::BitReader;
85#[doc = "Field `DM_OVV` reader - DM over voltage"]
86pub type DM_OVV_R = crate::BitReader;
87impl R {
88 #[doc = "Bit 0 - Enable the second DP pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2"]
89 #[inline(always)]
90 pub fn dp_pullup_hisel(&self) -> DP_PULLUP_HISEL_R {
91 DP_PULLUP_HISEL_R::new((self.bits & 1) != 0)
92 }
93 #[doc = "Bit 1 - DP pull up enable"]
94 #[inline(always)]
95 pub fn dp_pullup_en(&self) -> DP_PULLUP_EN_R {
96 DP_PULLUP_EN_R::new(((self.bits >> 1) & 1) != 0)
97 }
98 #[doc = "Bit 2 - DP pull down enable"]
99 #[inline(always)]
100 pub fn dp_pulldn_en(&self) -> DP_PULLDN_EN_R {
101 DP_PULLDN_EN_R::new(((self.bits >> 2) & 1) != 0)
102 }
103 #[doc = "Bit 4 - Enable the second DM pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2"]
104 #[inline(always)]
105 pub fn dm_pullup_hisel(&self) -> DM_PULLUP_HISEL_R {
106 DM_PULLUP_HISEL_R::new(((self.bits >> 4) & 1) != 0)
107 }
108 #[doc = "Bit 5 - DM pull up enable"]
109 #[inline(always)]
110 pub fn dm_pullup_en(&self) -> DM_PULLUP_EN_R {
111 DM_PULLUP_EN_R::new(((self.bits >> 5) & 1) != 0)
112 }
113 #[doc = "Bit 6 - DM pull down enable"]
114 #[inline(always)]
115 pub fn dm_pulldn_en(&self) -> DM_PULLDN_EN_R {
116 DM_PULLDN_EN_R::new(((self.bits >> 6) & 1) != 0)
117 }
118 #[doc = "Bit 8 - Output enable. If TX_DIFFMODE=1, OE for DPP/DPM diff pair. 0 - DPP/DPM in Hi-Z state; 1 - DPP/DPM driving
119 If TX_DIFFMODE=0, OE for DPP only. 0 - DPP in Hi-Z state; 1 - DPP driving"]
120 #[inline(always)]
121 pub fn tx_dp_oe(&self) -> TX_DP_OE_R {
122 TX_DP_OE_R::new(((self.bits >> 8) & 1) != 0)
123 }
124 #[doc = "Bit 9 - Output enable. If TX_DIFFMODE=1, Ignored.
125 If TX_DIFFMODE=0, OE for DPM only. 0 - DPM in Hi-Z state; 1 - DPM driving"]
126 #[inline(always)]
127 pub fn tx_dm_oe(&self) -> TX_DM_OE_R {
128 TX_DM_OE_R::new(((self.bits >> 9) & 1) != 0)
129 }
130 #[doc = "Bit 10 - Output data. If TX_DIFFMODE=1, Drives DPP/DPM diff pair. TX_DP_OE=1 to enable drive. DPP=TX_DP, DPM=~TX_DP
131 If TX_DIFFMODE=0, Drives DPP only. TX_DP_OE=1 to enable drive. DPP=TX_DP"]
132 #[inline(always)]
133 pub fn tx_dp(&self) -> TX_DP_R {
134 TX_DP_R::new(((self.bits >> 10) & 1) != 0)
135 }
136 #[doc = "Bit 11 - Output data. TX_DIFFMODE=1, Ignored
137 TX_DIFFMODE=0, Drives DPM only. TX_DM_OE=1 to enable drive. DPM=TX_DM"]
138 #[inline(always)]
139 pub fn tx_dm(&self) -> TX_DM_R {
140 TX_DM_R::new(((self.bits >> 11) & 1) != 0)
141 }
142 #[doc = "Bit 12 - RX power down override (if override enable is set). 1 = powered down."]
143 #[inline(always)]
144 pub fn rx_pd(&self) -> RX_PD_R {
145 RX_PD_R::new(((self.bits >> 12) & 1) != 0)
146 }
147 #[doc = "Bit 13 - TX power down override (if override enable is set). 1 = powered down."]
148 #[inline(always)]
149 pub fn tx_pd(&self) -> TX_PD_R {
150 TX_PD_R::new(((self.bits >> 13) & 1) != 0)
151 }
152 #[doc = "Bit 14 - TX_FSSLEW=0: Low speed slew rate
153 TX_FSSLEW=1: Full speed slew rate"]
154 #[inline(always)]
155 pub fn tx_fsslew(&self) -> TX_FSSLEW_R {
156 TX_FSSLEW_R::new(((self.bits >> 14) & 1) != 0)
157 }
158 #[doc = "Bit 15 - TX_DIFFMODE=0: Single ended mode
159 TX_DIFFMODE=1: Differential drive mode (TX_DM, TX_DM_OE ignored)"]
160 #[inline(always)]
161 pub fn tx_diffmode(&self) -> TX_DIFFMODE_R {
162 TX_DIFFMODE_R::new(((self.bits >> 15) & 1) != 0)
163 }
164 #[doc = "Bit 16 - Differential RX"]
165 #[inline(always)]
166 pub fn rx_dd(&self) -> RX_DD_R {
167 RX_DD_R::new(((self.bits >> 16) & 1) != 0)
168 }
169 #[doc = "Bit 17 - DPP pin state"]
170 #[inline(always)]
171 pub fn rx_dp(&self) -> RX_DP_R {
172 RX_DP_R::new(((self.bits >> 17) & 1) != 0)
173 }
174 #[doc = "Bit 18 - DPM pin state"]
175 #[inline(always)]
176 pub fn rx_dm(&self) -> RX_DM_R {
177 RX_DM_R::new(((self.bits >> 18) & 1) != 0)
178 }
179 #[doc = "Bit 19 - DP overcurrent"]
180 #[inline(always)]
181 pub fn dp_ovcn(&self) -> DP_OVCN_R {
182 DP_OVCN_R::new(((self.bits >> 19) & 1) != 0)
183 }
184 #[doc = "Bit 20 - DM overcurrent"]
185 #[inline(always)]
186 pub fn dm_ovcn(&self) -> DM_OVCN_R {
187 DM_OVCN_R::new(((self.bits >> 20) & 1) != 0)
188 }
189 #[doc = "Bit 21 - DP over voltage"]
190 #[inline(always)]
191 pub fn dp_ovv(&self) -> DP_OVV_R {
192 DP_OVV_R::new(((self.bits >> 21) & 1) != 0)
193 }
194 #[doc = "Bit 22 - DM over voltage"]
195 #[inline(always)]
196 pub fn dm_ovv(&self) -> DM_OVV_R {
197 DM_OVV_R::new(((self.bits >> 22) & 1) != 0)
198 }
199}
200impl W {
201 #[doc = "Bit 0 - Enable the second DP pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2"]
202 #[inline(always)]
203 #[must_use]
204 pub fn dp_pullup_hisel(&mut self) -> DP_PULLUP_HISEL_W<USBPHY_DIRECT_SPEC> {
205 DP_PULLUP_HISEL_W::new(self, 0)
206 }
207 #[doc = "Bit 1 - DP pull up enable"]
208 #[inline(always)]
209 #[must_use]
210 pub fn dp_pullup_en(&mut self) -> DP_PULLUP_EN_W<USBPHY_DIRECT_SPEC> {
211 DP_PULLUP_EN_W::new(self, 1)
212 }
213 #[doc = "Bit 2 - DP pull down enable"]
214 #[inline(always)]
215 #[must_use]
216 pub fn dp_pulldn_en(&mut self) -> DP_PULLDN_EN_W<USBPHY_DIRECT_SPEC> {
217 DP_PULLDN_EN_W::new(self, 2)
218 }
219 #[doc = "Bit 4 - Enable the second DM pull up resistor. 0 - Pull = Rpu2; 1 - Pull = Rpu1 + Rpu2"]
220 #[inline(always)]
221 #[must_use]
222 pub fn dm_pullup_hisel(&mut self) -> DM_PULLUP_HISEL_W<USBPHY_DIRECT_SPEC> {
223 DM_PULLUP_HISEL_W::new(self, 4)
224 }
225 #[doc = "Bit 5 - DM pull up enable"]
226 #[inline(always)]
227 #[must_use]
228 pub fn dm_pullup_en(&mut self) -> DM_PULLUP_EN_W<USBPHY_DIRECT_SPEC> {
229 DM_PULLUP_EN_W::new(self, 5)
230 }
231 #[doc = "Bit 6 - DM pull down enable"]
232 #[inline(always)]
233 #[must_use]
234 pub fn dm_pulldn_en(&mut self) -> DM_PULLDN_EN_W<USBPHY_DIRECT_SPEC> {
235 DM_PULLDN_EN_W::new(self, 6)
236 }
237 #[doc = "Bit 8 - Output enable. If TX_DIFFMODE=1, OE for DPP/DPM diff pair. 0 - DPP/DPM in Hi-Z state; 1 - DPP/DPM driving
238 If TX_DIFFMODE=0, OE for DPP only. 0 - DPP in Hi-Z state; 1 - DPP driving"]
239 #[inline(always)]
240 #[must_use]
241 pub fn tx_dp_oe(&mut self) -> TX_DP_OE_W<USBPHY_DIRECT_SPEC> {
242 TX_DP_OE_W::new(self, 8)
243 }
244 #[doc = "Bit 9 - Output enable. If TX_DIFFMODE=1, Ignored.
245 If TX_DIFFMODE=0, OE for DPM only. 0 - DPM in Hi-Z state; 1 - DPM driving"]
246 #[inline(always)]
247 #[must_use]
248 pub fn tx_dm_oe(&mut self) -> TX_DM_OE_W<USBPHY_DIRECT_SPEC> {
249 TX_DM_OE_W::new(self, 9)
250 }
251 #[doc = "Bit 10 - Output data. If TX_DIFFMODE=1, Drives DPP/DPM diff pair. TX_DP_OE=1 to enable drive. DPP=TX_DP, DPM=~TX_DP
252 If TX_DIFFMODE=0, Drives DPP only. TX_DP_OE=1 to enable drive. DPP=TX_DP"]
253 #[inline(always)]
254 #[must_use]
255 pub fn tx_dp(&mut self) -> TX_DP_W<USBPHY_DIRECT_SPEC> {
256 TX_DP_W::new(self, 10)
257 }
258 #[doc = "Bit 11 - Output data. TX_DIFFMODE=1, Ignored
259 TX_DIFFMODE=0, Drives DPM only. TX_DM_OE=1 to enable drive. DPM=TX_DM"]
260 #[inline(always)]
261 #[must_use]
262 pub fn tx_dm(&mut self) -> TX_DM_W<USBPHY_DIRECT_SPEC> {
263 TX_DM_W::new(self, 11)
264 }
265 #[doc = "Bit 12 - RX power down override (if override enable is set). 1 = powered down."]
266 #[inline(always)]
267 #[must_use]
268 pub fn rx_pd(&mut self) -> RX_PD_W<USBPHY_DIRECT_SPEC> {
269 RX_PD_W::new(self, 12)
270 }
271 #[doc = "Bit 13 - TX power down override (if override enable is set). 1 = powered down."]
272 #[inline(always)]
273 #[must_use]
274 pub fn tx_pd(&mut self) -> TX_PD_W<USBPHY_DIRECT_SPEC> {
275 TX_PD_W::new(self, 13)
276 }
277 #[doc = "Bit 14 - TX_FSSLEW=0: Low speed slew rate
278 TX_FSSLEW=1: Full speed slew rate"]
279 #[inline(always)]
280 #[must_use]
281 pub fn tx_fsslew(&mut self) -> TX_FSSLEW_W<USBPHY_DIRECT_SPEC> {
282 TX_FSSLEW_W::new(self, 14)
283 }
284 #[doc = "Bit 15 - TX_DIFFMODE=0: Single ended mode
285 TX_DIFFMODE=1: Differential drive mode (TX_DM, TX_DM_OE ignored)"]
286 #[inline(always)]
287 #[must_use]
288 pub fn tx_diffmode(&mut self) -> TX_DIFFMODE_W<USBPHY_DIRECT_SPEC> {
289 TX_DIFFMODE_W::new(self, 15)
290 }
291 #[doc = r" Writes raw bits to the register."]
292 #[doc = r""]
293 #[doc = r" # Safety"]
294 #[doc = r""]
295 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
296 #[inline(always)]
297 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
298 self.bits = bits;
299 self
300 }
301}
302#[doc = "This register allows for direct control of the USB phy. Use in conjunction with usbphy_direct_override register to enable each override bit.
303
304You can [`read`](crate::generic::Reg::read) this register and get [`usbphy_direct::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbphy_direct::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
305pub struct USBPHY_DIRECT_SPEC;
306impl crate::RegisterSpec for USBPHY_DIRECT_SPEC {
307 type Ux = u32;
308}
309#[doc = "`read()` method returns [`usbphy_direct::R`](R) reader structure"]
310impl crate::Readable for USBPHY_DIRECT_SPEC {}
311#[doc = "`write(|w| ..)` method takes [`usbphy_direct::W`](W) writer structure"]
312impl crate::Writable for USBPHY_DIRECT_SPEC {
313 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
314 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
315}
316#[doc = "`reset()` method sets USBPHY_DIRECT to value 0"]
317impl crate::Resettable for USBPHY_DIRECT_SPEC {
318 const RESET_VALUE: u32 = 0;
319}