nrf52840_pac/spim0/
config.rs

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1#[doc = "Register `CONFIG` reader"]
2pub struct R(crate::R<CONFIG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CONFIG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CONFIG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CONFIG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CONFIG` writer"]
17pub struct W(crate::W<CONFIG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CONFIG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CONFIG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CONFIG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ORDER` reader - Bit order"]
38pub type ORDER_R = crate::BitReader<ORDER_A>;
39#[doc = "Bit order\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41pub enum ORDER_A {
42    #[doc = "0: Most significant bit shifted out first"]
43    MSB_FIRST = 0,
44    #[doc = "1: Least significant bit shifted out first"]
45    LSB_FIRST = 1,
46}
47impl From<ORDER_A> for bool {
48    #[inline(always)]
49    fn from(variant: ORDER_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl ORDER_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> ORDER_A {
57        match self.bits {
58            false => ORDER_A::MSB_FIRST,
59            true => ORDER_A::LSB_FIRST,
60        }
61    }
62    #[doc = "Checks if the value of the field is `MSB_FIRST`"]
63    #[inline(always)]
64    pub fn is_msb_first(&self) -> bool {
65        *self == ORDER_A::MSB_FIRST
66    }
67    #[doc = "Checks if the value of the field is `LSB_FIRST`"]
68    #[inline(always)]
69    pub fn is_lsb_first(&self) -> bool {
70        *self == ORDER_A::LSB_FIRST
71    }
72}
73#[doc = "Field `ORDER` writer - Bit order"]
74pub type ORDER_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIG_SPEC, ORDER_A, O>;
75impl<'a, const O: u8> ORDER_W<'a, O> {
76    #[doc = "Most significant bit shifted out first"]
77    #[inline(always)]
78    pub fn msb_first(self) -> &'a mut W {
79        self.variant(ORDER_A::MSB_FIRST)
80    }
81    #[doc = "Least significant bit shifted out first"]
82    #[inline(always)]
83    pub fn lsb_first(self) -> &'a mut W {
84        self.variant(ORDER_A::LSB_FIRST)
85    }
86}
87#[doc = "Field `CPHA` reader - Serial clock (SCK) phase"]
88pub type CPHA_R = crate::BitReader<CPHA_A>;
89#[doc = "Serial clock (SCK) phase\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq)]
91pub enum CPHA_A {
92    #[doc = "0: Sample on leading edge of clock, shift serial data on trailing edge"]
93    LEADING = 0,
94    #[doc = "1: Sample on trailing edge of clock, shift serial data on leading edge"]
95    TRAILING = 1,
96}
97impl From<CPHA_A> for bool {
98    #[inline(always)]
99    fn from(variant: CPHA_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl CPHA_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> CPHA_A {
107        match self.bits {
108            false => CPHA_A::LEADING,
109            true => CPHA_A::TRAILING,
110        }
111    }
112    #[doc = "Checks if the value of the field is `LEADING`"]
113    #[inline(always)]
114    pub fn is_leading(&self) -> bool {
115        *self == CPHA_A::LEADING
116    }
117    #[doc = "Checks if the value of the field is `TRAILING`"]
118    #[inline(always)]
119    pub fn is_trailing(&self) -> bool {
120        *self == CPHA_A::TRAILING
121    }
122}
123#[doc = "Field `CPHA` writer - Serial clock (SCK) phase"]
124pub type CPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIG_SPEC, CPHA_A, O>;
125impl<'a, const O: u8> CPHA_W<'a, O> {
126    #[doc = "Sample on leading edge of clock, shift serial data on trailing edge"]
127    #[inline(always)]
128    pub fn leading(self) -> &'a mut W {
129        self.variant(CPHA_A::LEADING)
130    }
131    #[doc = "Sample on trailing edge of clock, shift serial data on leading edge"]
132    #[inline(always)]
133    pub fn trailing(self) -> &'a mut W {
134        self.variant(CPHA_A::TRAILING)
135    }
136}
137#[doc = "Field `CPOL` reader - Serial clock (SCK) polarity"]
138pub type CPOL_R = crate::BitReader<CPOL_A>;
139#[doc = "Serial clock (SCK) polarity\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq)]
141pub enum CPOL_A {
142    #[doc = "0: Active high"]
143    ACTIVE_HIGH = 0,
144    #[doc = "1: Active low"]
145    ACTIVE_LOW = 1,
146}
147impl From<CPOL_A> for bool {
148    #[inline(always)]
149    fn from(variant: CPOL_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl CPOL_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> CPOL_A {
157        match self.bits {
158            false => CPOL_A::ACTIVE_HIGH,
159            true => CPOL_A::ACTIVE_LOW,
160        }
161    }
162    #[doc = "Checks if the value of the field is `ACTIVE_HIGH`"]
163    #[inline(always)]
164    pub fn is_active_high(&self) -> bool {
165        *self == CPOL_A::ACTIVE_HIGH
166    }
167    #[doc = "Checks if the value of the field is `ACTIVE_LOW`"]
168    #[inline(always)]
169    pub fn is_active_low(&self) -> bool {
170        *self == CPOL_A::ACTIVE_LOW
171    }
172}
173#[doc = "Field `CPOL` writer - Serial clock (SCK) polarity"]
174pub type CPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CONFIG_SPEC, CPOL_A, O>;
175impl<'a, const O: u8> CPOL_W<'a, O> {
176    #[doc = "Active high"]
177    #[inline(always)]
178    pub fn active_high(self) -> &'a mut W {
179        self.variant(CPOL_A::ACTIVE_HIGH)
180    }
181    #[doc = "Active low"]
182    #[inline(always)]
183    pub fn active_low(self) -> &'a mut W {
184        self.variant(CPOL_A::ACTIVE_LOW)
185    }
186}
187impl R {
188    #[doc = "Bit 0 - Bit order"]
189    #[inline(always)]
190    pub fn order(&self) -> ORDER_R {
191        ORDER_R::new((self.bits & 1) != 0)
192    }
193    #[doc = "Bit 1 - Serial clock (SCK) phase"]
194    #[inline(always)]
195    pub fn cpha(&self) -> CPHA_R {
196        CPHA_R::new(((self.bits >> 1) & 1) != 0)
197    }
198    #[doc = "Bit 2 - Serial clock (SCK) polarity"]
199    #[inline(always)]
200    pub fn cpol(&self) -> CPOL_R {
201        CPOL_R::new(((self.bits >> 2) & 1) != 0)
202    }
203}
204impl W {
205    #[doc = "Bit 0 - Bit order"]
206    #[inline(always)]
207    pub fn order(&mut self) -> ORDER_W<0> {
208        ORDER_W::new(self)
209    }
210    #[doc = "Bit 1 - Serial clock (SCK) phase"]
211    #[inline(always)]
212    pub fn cpha(&mut self) -> CPHA_W<1> {
213        CPHA_W::new(self)
214    }
215    #[doc = "Bit 2 - Serial clock (SCK) polarity"]
216    #[inline(always)]
217    pub fn cpol(&mut self) -> CPOL_W<2> {
218        CPOL_W::new(self)
219    }
220    #[doc = "Writes raw bits to the register."]
221    #[inline(always)]
222    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
223        self.0.bits(bits);
224        self
225    }
226}
227#[doc = "Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [config](index.html) module"]
228pub struct CONFIG_SPEC;
229impl crate::RegisterSpec for CONFIG_SPEC {
230    type Ux = u32;
231}
232#[doc = "`read()` method returns [config::R](R) reader structure"]
233impl crate::Readable for CONFIG_SPEC {
234    type Reader = R;
235}
236#[doc = "`write(|w| ..)` method takes [config::W](W) writer structure"]
237impl crate::Writable for CONFIG_SPEC {
238    type Writer = W;
239}
240#[doc = "`reset()` method sets CONFIG to value 0"]
241impl crate::Resettable for CONFIG_SPEC {
242    #[inline(always)]
243    fn reset_value() -> Self::Ux {
244        0
245    }
246}
nrf52840_pac/spim0/config.rs

nrf52840_pac/spim0/
config.rs
