rp2040_pac/sio/
interp1_accum1_add.rs

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1#[doc = "Register `INTERP1_ACCUM1_ADD` reader"]
2pub type R = crate::R<INTERP1_ACCUM1_ADD_SPEC>;
3#[doc = "Register `INTERP1_ACCUM1_ADD` writer"]
4pub type W = crate::W<INTERP1_ACCUM1_ADD_SPEC>;
5#[doc = "Field `INTERP1_ACCUM1_ADD` reader - "]
6pub type INTERP1_ACCUM1_ADD_R = crate::FieldReader<u32>;
7#[doc = "Field `INTERP1_ACCUM1_ADD` writer - "]
8pub type INTERP1_ACCUM1_ADD_W<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>;
9impl R {
10    #[doc = "Bits 0:23"]
11    #[inline(always)]
12    pub fn interp1_accum1_add(&self) -> INTERP1_ACCUM1_ADD_R {
13        INTERP1_ACCUM1_ADD_R::new(self.bits & 0x00ff_ffff)
14    }
15}
16impl W {
17    #[doc = "Bits 0:23"]
18    #[inline(always)]
19    #[must_use]
20    pub fn interp1_accum1_add(&mut self) -> INTERP1_ACCUM1_ADD_W<INTERP1_ACCUM1_ADD_SPEC> {
21        INTERP1_ACCUM1_ADD_W::new(self, 0)
22    }
23    #[doc = r" Writes raw bits to the register."]
24    #[doc = r""]
25    #[doc = r" # Safety"]
26    #[doc = r""]
27    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
28    #[inline(always)]
29    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
30        self.bits = bits;
31        self
32    }
33}
34#[doc = "Values written here are atomically added to ACCUM1  
35 Reading yields lane 1's raw shift and mask value (BASE1 not added).  
36
37You can [`read`](crate::generic::Reg::read) this register and get [`interp1_accum1_add::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`interp1_accum1_add::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
38pub struct INTERP1_ACCUM1_ADD_SPEC;
39impl crate::RegisterSpec for INTERP1_ACCUM1_ADD_SPEC {
40    type Ux = u32;
41}
42#[doc = "`read()` method returns [`interp1_accum1_add::R`](R) reader structure"]
43impl crate::Readable for INTERP1_ACCUM1_ADD_SPEC {}
44#[doc = "`write(|w| ..)` method takes [`interp1_accum1_add::W`](W) writer structure"]
45impl crate::Writable for INTERP1_ACCUM1_ADD_SPEC {
46    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
47    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
48}
49#[doc = "`reset()` method sets INTERP1_ACCUM1_ADD to value 0"]
50impl crate::Resettable for INTERP1_ACCUM1_ADD_SPEC {
51    const RESET_VALUE: u32 = 0;
52}
rp2040_pac/sio/interp1_accum1_add.rs

rp2040_pac/sio/
interp1_accum1_add.rs
