rp2040_pac/busctrl/
bus_priority.rs

1#[doc = "Register `BUS_PRIORITY` reader"]
2pub type R = crate::R<BUS_PRIORITY_SPEC>;
3#[doc = "Register `BUS_PRIORITY` writer"]
4pub type W = crate::W<BUS_PRIORITY_SPEC>;
5#[doc = "Field `PROC0` reader - 0 - low priority, 1 - high priority"]
6pub type PROC0_R = crate::BitReader;
7#[doc = "Field `PROC0` writer - 0 - low priority, 1 - high priority"]
8pub type PROC0_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `PROC1` reader - 0 - low priority, 1 - high priority"]
10pub type PROC1_R = crate::BitReader;
11#[doc = "Field `PROC1` writer - 0 - low priority, 1 - high priority"]
12pub type PROC1_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `DMA_R` reader - 0 - low priority, 1 - high priority"]
14pub type DMA_R_R = crate::BitReader;
15#[doc = "Field `DMA_R` writer - 0 - low priority, 1 - high priority"]
16pub type DMA_R_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `DMA_W` reader - 0 - low priority, 1 - high priority"]
18pub type DMA_W_R = crate::BitReader;
19#[doc = "Field `DMA_W` writer - 0 - low priority, 1 - high priority"]
20pub type DMA_W_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bit 0 - 0 - low priority, 1 - high priority"]
23    #[inline(always)]
24    pub fn proc0(&self) -> PROC0_R {
25        PROC0_R::new((self.bits & 1) != 0)
26    }
27    #[doc = "Bit 4 - 0 - low priority, 1 - high priority"]
28    #[inline(always)]
29    pub fn proc1(&self) -> PROC1_R {
30        PROC1_R::new(((self.bits >> 4) & 1) != 0)
31    }
32    #[doc = "Bit 8 - 0 - low priority, 1 - high priority"]
33    #[inline(always)]
34    pub fn dma_r(&self) -> DMA_R_R {
35        DMA_R_R::new(((self.bits >> 8) & 1) != 0)
36    }
37    #[doc = "Bit 12 - 0 - low priority, 1 - high priority"]
38    #[inline(always)]
39    pub fn dma_w(&self) -> DMA_W_R {
40        DMA_W_R::new(((self.bits >> 12) & 1) != 0)
41    }
42}
43impl W {
44    #[doc = "Bit 0 - 0 - low priority, 1 - high priority"]
45    #[inline(always)]
46    #[must_use]
47    pub fn proc0(&mut self) -> PROC0_W<BUS_PRIORITY_SPEC> {
48        PROC0_W::new(self, 0)
49    }
50    #[doc = "Bit 4 - 0 - low priority, 1 - high priority"]
51    #[inline(always)]
52    #[must_use]
53    pub fn proc1(&mut self) -> PROC1_W<BUS_PRIORITY_SPEC> {
54        PROC1_W::new(self, 4)
55    }
56    #[doc = "Bit 8 - 0 - low priority, 1 - high priority"]
57    #[inline(always)]
58    #[must_use]
59    pub fn dma_r(&mut self) -> DMA_R_W<BUS_PRIORITY_SPEC> {
60        DMA_R_W::new(self, 8)
61    }
62    #[doc = "Bit 12 - 0 - low priority, 1 - high priority"]
63    #[inline(always)]
64    #[must_use]
65    pub fn dma_w(&mut self) -> DMA_W_W<BUS_PRIORITY_SPEC> {
66        DMA_W_W::new(self, 12)
67    }
68    #[doc = r" Writes raw bits to the register."]
69    #[doc = r""]
70    #[doc = r" # Safety"]
71    #[doc = r""]
72    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
73    #[inline(always)]
74    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
75        self.bits = bits;
76        self
77    }
78}
79#[doc = "Set the priority of each master for bus arbitration.  
80
81You can [`read`](crate::generic::Reg::read) this register and get [`bus_priority::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bus_priority::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
82pub struct BUS_PRIORITY_SPEC;
83impl crate::RegisterSpec for BUS_PRIORITY_SPEC {
84    type Ux = u32;
85}
86#[doc = "`read()` method returns [`bus_priority::R`](R) reader structure"]
87impl crate::Readable for BUS_PRIORITY_SPEC {}
88#[doc = "`write(|w| ..)` method takes [`bus_priority::W`](W) writer structure"]
89impl crate::Writable for BUS_PRIORITY_SPEC {
90    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
91    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
92}
93#[doc = "`reset()` method sets BUS_PRIORITY to value 0"]
94impl crate::Resettable for BUS_PRIORITY_SPEC {
95    const RESET_VALUE: u32 = 0;
96}