nrf52840_pac/usbd/
dpdmvalue.rs

1#[doc = "Register `DPDMVALUE` reader"]
2pub struct R(crate::R<DPDMVALUE_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DPDMVALUE_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DPDMVALUE_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DPDMVALUE_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DPDMVALUE` writer"]
17pub struct W(crate::W<DPDMVALUE_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DPDMVALUE_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DPDMVALUE_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DPDMVALUE_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `STATE` reader - State D+ and D- lines will be forced into by the DPDMDRIVE task"]
38pub type STATE_R = crate::FieldReader<u8, STATE_A>;
39#[doc = "State D+ and D- lines will be forced into by the DPDMDRIVE task\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41#[repr(u8)]
42pub enum STATE_A {
43    #[doc = "1: D+ forced low, D- forced high (K state) for a timing preset in hardware (50 us or 5 ms, depending on bus state)"]
44    RESUME = 1,
45    #[doc = "2: D+ forced high, D- forced low (J state)"]
46    J = 2,
47    #[doc = "4: D+ forced low, D- forced high (K state)"]
48    K = 4,
49}
50impl From<STATE_A> for u8 {
51    #[inline(always)]
52    fn from(variant: STATE_A) -> Self {
53        variant as _
54    }
55}
56impl STATE_R {
57    #[doc = "Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> Option<STATE_A> {
60        match self.bits {
61            1 => Some(STATE_A::RESUME),
62            2 => Some(STATE_A::J),
63            4 => Some(STATE_A::K),
64            _ => None,
65        }
66    }
67    #[doc = "Checks if the value of the field is `RESUME`"]
68    #[inline(always)]
69    pub fn is_resume(&self) -> bool {
70        *self == STATE_A::RESUME
71    }
72    #[doc = "Checks if the value of the field is `J`"]
73    #[inline(always)]
74    pub fn is_j(&self) -> bool {
75        *self == STATE_A::J
76    }
77    #[doc = "Checks if the value of the field is `K`"]
78    #[inline(always)]
79    pub fn is_k(&self) -> bool {
80        *self == STATE_A::K
81    }
82}
83#[doc = "Field `STATE` writer - State D+ and D- lines will be forced into by the DPDMDRIVE task"]
84pub type STATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, DPDMVALUE_SPEC, u8, STATE_A, 5, O>;
85impl<'a, const O: u8> STATE_W<'a, O> {
86    #[doc = "D+ forced low, D- forced high (K state) for a timing preset in hardware (50 us or 5 ms, depending on bus state)"]
87    #[inline(always)]
88    pub fn resume(self) -> &'a mut W {
89        self.variant(STATE_A::RESUME)
90    }
91    #[doc = "D+ forced high, D- forced low (J state)"]
92    #[inline(always)]
93    pub fn j(self) -> &'a mut W {
94        self.variant(STATE_A::J)
95    }
96    #[doc = "D+ forced low, D- forced high (K state)"]
97    #[inline(always)]
98    pub fn k(self) -> &'a mut W {
99        self.variant(STATE_A::K)
100    }
101}
102impl R {
103    #[doc = "Bits 0:4 - State D+ and D- lines will be forced into by the DPDMDRIVE task"]
104    #[inline(always)]
105    pub fn state(&self) -> STATE_R {
106        STATE_R::new((self.bits & 0x1f) as u8)
107    }
108}
109impl W {
110    #[doc = "Bits 0:4 - State D+ and D- lines will be forced into by the DPDMDRIVE task"]
111    #[inline(always)]
112    pub fn state(&mut self) -> STATE_W<0> {
113        STATE_W::new(self)
114    }
115    #[doc = "Writes raw bits to the register."]
116    #[inline(always)]
117    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
118        self.0.bits(bits);
119        self
120    }
121}
122#[doc = "State D+ and D- lines will be forced into by the DPDMDRIVE task. The DPDMNODRIVE task reverts the control of the lines to MAC IP (no forcing).\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dpdmvalue](index.html) module"]
123pub struct DPDMVALUE_SPEC;
124impl crate::RegisterSpec for DPDMVALUE_SPEC {
125    type Ux = u32;
126}
127#[doc = "`read()` method returns [dpdmvalue::R](R) reader structure"]
128impl crate::Readable for DPDMVALUE_SPEC {
129    type Reader = R;
130}
131#[doc = "`write(|w| ..)` method takes [dpdmvalue::W](W) writer structure"]
132impl crate::Writable for DPDMVALUE_SPEC {
133    type Writer = W;
134}
135#[doc = "`reset()` method sets DPDMVALUE to value 0"]
136impl crate::Resettable for DPDMVALUE_SPEC {
137    #[inline(always)]
138    fn reset_value() -> Self::Ux {
139        0
140    }
141}