rp2040_pac/timer/
dbgpause.rs

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1#[doc = "Register `DBGPAUSE` reader"]
2pub type R = crate::R<DBGPAUSE_SPEC>;
3#[doc = "Register `DBGPAUSE` writer"]
4pub type W = crate::W<DBGPAUSE_SPEC>;
5#[doc = "Field `DBG0` reader - Pause when processor 0 is in debug mode"]
6pub type DBG0_R = crate::BitReader;
7#[doc = "Field `DBG0` writer - Pause when processor 0 is in debug mode"]
8pub type DBG0_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DBG1` reader - Pause when processor 1 is in debug mode"]
10pub type DBG1_R = crate::BitReader;
11#[doc = "Field `DBG1` writer - Pause when processor 1 is in debug mode"]
12pub type DBG1_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bit 1 - Pause when processor 0 is in debug mode"]
15    #[inline(always)]
16    pub fn dbg0(&self) -> DBG0_R {
17        DBG0_R::new(((self.bits >> 1) & 1) != 0)
18    }
19    #[doc = "Bit 2 - Pause when processor 1 is in debug mode"]
20    #[inline(always)]
21    pub fn dbg1(&self) -> DBG1_R {
22        DBG1_R::new(((self.bits >> 2) & 1) != 0)
23    }
24}
25impl W {
26    #[doc = "Bit 1 - Pause when processor 0 is in debug mode"]
27    #[inline(always)]
28    #[must_use]
29    pub fn dbg0(&mut self) -> DBG0_W<DBGPAUSE_SPEC> {
30        DBG0_W::new(self, 1)
31    }
32    #[doc = "Bit 2 - Pause when processor 1 is in debug mode"]
33    #[inline(always)]
34    #[must_use]
35    pub fn dbg1(&mut self) -> DBG1_W<DBGPAUSE_SPEC> {
36        DBG1_W::new(self, 2)
37    }
38    #[doc = r" Writes raw bits to the register."]
39    #[doc = r""]
40    #[doc = r" # Safety"]
41    #[doc = r""]
42    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
43    #[inline(always)]
44    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
45        self.bits = bits;
46        self
47    }
48}
49#[doc = "Set bits high to enable pause when the corresponding debug ports are active  
50
51You can [`read`](crate::generic::Reg::read) this register and get [`dbgpause::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dbgpause::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
52pub struct DBGPAUSE_SPEC;
53impl crate::RegisterSpec for DBGPAUSE_SPEC {
54    type Ux = u32;
55}
56#[doc = "`read()` method returns [`dbgpause::R`](R) reader structure"]
57impl crate::Readable for DBGPAUSE_SPEC {}
58#[doc = "`write(|w| ..)` method takes [`dbgpause::W`](W) writer structure"]
59impl crate::Writable for DBGPAUSE_SPEC {
60    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
61    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
62}
63#[doc = "`reset()` method sets DBGPAUSE to value 0x07"]
64impl crate::Resettable for DBGPAUSE_SPEC {
65    const RESET_VALUE: u32 = 0x07;
66}
rp2040_pac/timer/dbgpause.rs

rp2040_pac/timer/
dbgpause.rs
