nrf52840_pac/clock/
lfclkstat.rs
1#[doc = "Register `LFCLKSTAT` reader"]
2pub struct R(crate::R<LFCLKSTAT_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<LFCLKSTAT_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<LFCLKSTAT_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<LFCLKSTAT_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `SRC` reader - Source of LFCLK"]
17pub type SRC_R = crate::FieldReader<u8, SRC_A>;
18#[doc = "Source of LFCLK\n\nValue on reset: 0"]
19#[derive(Clone, Copy, Debug, PartialEq)]
20#[repr(u8)]
21pub enum SRC_A {
22 #[doc = "0: 32.768 kHz RC oscillator (LFRC)"]
23 RC = 0,
24 #[doc = "1: 32.768 kHz crystal oscillator (LFXO)"]
25 XTAL = 1,
26 #[doc = "2: 32.768 kHz synthesized from HFCLK (LFSYNT)"]
27 SYNTH = 2,
28}
29impl From<SRC_A> for u8 {
30 #[inline(always)]
31 fn from(variant: SRC_A) -> Self {
32 variant as _
33 }
34}
35impl SRC_R {
36 #[doc = "Get enumerated values variant"]
37 #[inline(always)]
38 pub fn variant(&self) -> Option<SRC_A> {
39 match self.bits {
40 0 => Some(SRC_A::RC),
41 1 => Some(SRC_A::XTAL),
42 2 => Some(SRC_A::SYNTH),
43 _ => None,
44 }
45 }
46 #[doc = "Checks if the value of the field is `RC`"]
47 #[inline(always)]
48 pub fn is_rc(&self) -> bool {
49 *self == SRC_A::RC
50 }
51 #[doc = "Checks if the value of the field is `XTAL`"]
52 #[inline(always)]
53 pub fn is_xtal(&self) -> bool {
54 *self == SRC_A::XTAL
55 }
56 #[doc = "Checks if the value of the field is `SYNTH`"]
57 #[inline(always)]
58 pub fn is_synth(&self) -> bool {
59 *self == SRC_A::SYNTH
60 }
61}
62#[doc = "Field `STATE` reader - LFCLK state"]
63pub type STATE_R = crate::BitReader<STATE_A>;
64#[doc = "LFCLK state\n\nValue on reset: 0"]
65#[derive(Clone, Copy, Debug, PartialEq)]
66pub enum STATE_A {
67 #[doc = "0: LFCLK not running"]
68 NOT_RUNNING = 0,
69 #[doc = "1: LFCLK running"]
70 RUNNING = 1,
71}
72impl From<STATE_A> for bool {
73 #[inline(always)]
74 fn from(variant: STATE_A) -> Self {
75 variant as u8 != 0
76 }
77}
78impl STATE_R {
79 #[doc = "Get enumerated values variant"]
80 #[inline(always)]
81 pub fn variant(&self) -> STATE_A {
82 match self.bits {
83 false => STATE_A::NOT_RUNNING,
84 true => STATE_A::RUNNING,
85 }
86 }
87 #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
88 #[inline(always)]
89 pub fn is_not_running(&self) -> bool {
90 *self == STATE_A::NOT_RUNNING
91 }
92 #[doc = "Checks if the value of the field is `RUNNING`"]
93 #[inline(always)]
94 pub fn is_running(&self) -> bool {
95 *self == STATE_A::RUNNING
96 }
97}
98impl R {
99 #[doc = "Bits 0:1 - Source of LFCLK"]
100 #[inline(always)]
101 pub fn src(&self) -> SRC_R {
102 SRC_R::new((self.bits & 3) as u8)
103 }
104 #[doc = "Bit 16 - LFCLK state"]
105 #[inline(always)]
106 pub fn state(&self) -> STATE_R {
107 STATE_R::new(((self.bits >> 16) & 1) != 0)
108 }
109}
110#[doc = "LFCLK status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkstat](index.html) module"]
111pub struct LFCLKSTAT_SPEC;
112impl crate::RegisterSpec for LFCLKSTAT_SPEC {
113 type Ux = u32;
114}
115#[doc = "`read()` method returns [lfclkstat::R](R) reader structure"]
116impl crate::Readable for LFCLKSTAT_SPEC {
117 type Reader = R;
118}
119#[doc = "`reset()` method sets LFCLKSTAT to value 0"]
120impl crate::Resettable for LFCLKSTAT_SPEC {
121 #[inline(always)]
122 fn reset_value() -> Self::Ux {
123 0
124 }
125}