rp2040_pac/pio0/
dbg_padout.rs

1#[doc = "Register `DBG_PADOUT` reader"]
2pub type R = crate::R<DBG_PADOUT_SPEC>;
3impl core::fmt::Debug for R {
4    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
5        write!(f, "{}", self.bits())
6    }
7}
8impl core::fmt::Debug for crate::generic::Reg<DBG_PADOUT_SPEC> {
9    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
10        core::fmt::Debug::fmt(&self.read(), f)
11    }
12}
13#[doc = "Read to sample the pad output values PIO is currently driving to the GPIOs. On RP2040 there are 30 GPIOs, so the two most significant bits are hardwired to 0.  
14
15You can [`read`](crate::generic::Reg::read) this register and get [`dbg_padout::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
16pub struct DBG_PADOUT_SPEC;
17impl crate::RegisterSpec for DBG_PADOUT_SPEC {
18    type Ux = u32;
19}
20#[doc = "`read()` method returns [`dbg_padout::R`](R) reader structure"]
21impl crate::Readable for DBG_PADOUT_SPEC {}
22#[doc = "`reset()` method sets DBG_PADOUT to value 0"]
23impl crate::Resettable for DBG_PADOUT_SPEC {
24    const RESET_VALUE: u32 = 0;
25}