rp2040_pac/dma/ch/
ch_write_addr.rs

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1#[doc = "Register `CH_WRITE_ADDR` reader"]
2pub type R = crate::R<CH_WRITE_ADDR_SPEC>;
3#[doc = "Register `CH_WRITE_ADDR` writer"]
4pub type W = crate::W<CH_WRITE_ADDR_SPEC>;
5impl core::fmt::Debug for R {
6    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
7        write!(f, "{}", self.bits())
8    }
9}
10impl core::fmt::Debug for crate::generic::Reg<CH_WRITE_ADDR_SPEC> {
11    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
12        core::fmt::Debug::fmt(&self.read(), f)
13    }
14}
15impl W {
16    #[doc = r" Writes raw bits to the register."]
17    #[doc = r""]
18    #[doc = r" # Safety"]
19    #[doc = r""]
20    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
21    #[inline(always)]
22    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
23        self.bits = bits;
24        self
25    }
26}
27#[doc = "DMA Channel 0 Write Address pointer  
28 This register updates automatically each time a write completes. The current value is the next address to be written by this channel.  
29
30You can [`read`](crate::generic::Reg::read) this register and get [`ch_write_addr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ch_write_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
31pub struct CH_WRITE_ADDR_SPEC;
32impl crate::RegisterSpec for CH_WRITE_ADDR_SPEC {
33    type Ux = u32;
34}
35#[doc = "`read()` method returns [`ch_write_addr::R`](R) reader structure"]
36impl crate::Readable for CH_WRITE_ADDR_SPEC {}
37#[doc = "`write(|w| ..)` method takes [`ch_write_addr::W`](W) writer structure"]
38impl crate::Writable for CH_WRITE_ADDR_SPEC {
39    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
40    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
41}
42#[doc = "`reset()` method sets CH_WRITE_ADDR to value 0"]
43impl crate::Resettable for CH_WRITE_ADDR_SPEC {
44    const RESET_VALUE: u32 = 0;
45}
rp2040_pac/dma/ch/ch_write_addr.rs

rp2040_pac/dma/ch/
ch_write_addr.rs
