rp2040_pac/dma/
n_channels.rs

1#[doc = "Register `N_CHANNELS` reader"]
2pub type R = crate::R<N_CHANNELS_SPEC>;
3#[doc = "Field `N_CHANNELS` reader - "]
4pub type N_CHANNELS_R = crate::FieldReader;
5impl R {
6    #[doc = "Bits 0:4"]
7    #[inline(always)]
8    pub fn n_channels(&self) -> N_CHANNELS_R {
9        N_CHANNELS_R::new((self.bits & 0x1f) as u8)
10    }
11}
12#[doc = "The number of channels this DMA instance is equipped with. This DMA supports up to 16 hardware channels, but can be configured with as few as one, to minimise silicon area.  
13
14You can [`read`](crate::generic::Reg::read) this register and get [`n_channels::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
15pub struct N_CHANNELS_SPEC;
16impl crate::RegisterSpec for N_CHANNELS_SPEC {
17    type Ux = u32;
18}
19#[doc = "`read()` method returns [`n_channels::R`](R) reader structure"]
20impl crate::Readable for N_CHANNELS_SPEC {}
21#[doc = "`reset()` method sets N_CHANNELS to value 0"]
22impl crate::Resettable for N_CHANNELS_SPEC {
23    const RESET_VALUE: u32 = 0;
24}