nrf52840_pac/saadc/ch/
pselp.rs
1#[doc = "Register `PSELP` reader"]
2pub struct R(crate::R<PSELP_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PSELP_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PSELP_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PSELP_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `PSELP` writer"]
17pub struct W(crate::W<PSELP_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<PSELP_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<PSELP_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<PSELP_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `PSELP` reader - Analog positive input channel"]
38pub type PSELP_R = crate::FieldReader<u8, PSELP_A>;
39#[doc = "Analog positive input channel\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41#[repr(u8)]
42pub enum PSELP_A {
43 #[doc = "0: Not connected"]
44 NC = 0,
45 #[doc = "1: AIN0"]
46 ANALOG_INPUT0 = 1,
47 #[doc = "2: AIN1"]
48 ANALOG_INPUT1 = 2,
49 #[doc = "3: AIN2"]
50 ANALOG_INPUT2 = 3,
51 #[doc = "4: AIN3"]
52 ANALOG_INPUT3 = 4,
53 #[doc = "5: AIN4"]
54 ANALOG_INPUT4 = 5,
55 #[doc = "6: AIN5"]
56 ANALOG_INPUT5 = 6,
57 #[doc = "7: AIN6"]
58 ANALOG_INPUT6 = 7,
59 #[doc = "8: AIN7"]
60 ANALOG_INPUT7 = 8,
61 #[doc = "9: VDD"]
62 VDD = 9,
63 #[doc = "13: VDDH/5"]
64 VDDHDIV5 = 13,
65}
66impl From<PSELP_A> for u8 {
67 #[inline(always)]
68 fn from(variant: PSELP_A) -> Self {
69 variant as _
70 }
71}
72impl PSELP_R {
73 #[doc = "Get enumerated values variant"]
74 #[inline(always)]
75 pub fn variant(&self) -> Option<PSELP_A> {
76 match self.bits {
77 0 => Some(PSELP_A::NC),
78 1 => Some(PSELP_A::ANALOG_INPUT0),
79 2 => Some(PSELP_A::ANALOG_INPUT1),
80 3 => Some(PSELP_A::ANALOG_INPUT2),
81 4 => Some(PSELP_A::ANALOG_INPUT3),
82 5 => Some(PSELP_A::ANALOG_INPUT4),
83 6 => Some(PSELP_A::ANALOG_INPUT5),
84 7 => Some(PSELP_A::ANALOG_INPUT6),
85 8 => Some(PSELP_A::ANALOG_INPUT7),
86 9 => Some(PSELP_A::VDD),
87 13 => Some(PSELP_A::VDDHDIV5),
88 _ => None,
89 }
90 }
91 #[doc = "Checks if the value of the field is `NC`"]
92 #[inline(always)]
93 pub fn is_nc(&self) -> bool {
94 *self == PSELP_A::NC
95 }
96 #[doc = "Checks if the value of the field is `ANALOG_INPUT0`"]
97 #[inline(always)]
98 pub fn is_analog_input0(&self) -> bool {
99 *self == PSELP_A::ANALOG_INPUT0
100 }
101 #[doc = "Checks if the value of the field is `ANALOG_INPUT1`"]
102 #[inline(always)]
103 pub fn is_analog_input1(&self) -> bool {
104 *self == PSELP_A::ANALOG_INPUT1
105 }
106 #[doc = "Checks if the value of the field is `ANALOG_INPUT2`"]
107 #[inline(always)]
108 pub fn is_analog_input2(&self) -> bool {
109 *self == PSELP_A::ANALOG_INPUT2
110 }
111 #[doc = "Checks if the value of the field is `ANALOG_INPUT3`"]
112 #[inline(always)]
113 pub fn is_analog_input3(&self) -> bool {
114 *self == PSELP_A::ANALOG_INPUT3
115 }
116 #[doc = "Checks if the value of the field is `ANALOG_INPUT4`"]
117 #[inline(always)]
118 pub fn is_analog_input4(&self) -> bool {
119 *self == PSELP_A::ANALOG_INPUT4
120 }
121 #[doc = "Checks if the value of the field is `ANALOG_INPUT5`"]
122 #[inline(always)]
123 pub fn is_analog_input5(&self) -> bool {
124 *self == PSELP_A::ANALOG_INPUT5
125 }
126 #[doc = "Checks if the value of the field is `ANALOG_INPUT6`"]
127 #[inline(always)]
128 pub fn is_analog_input6(&self) -> bool {
129 *self == PSELP_A::ANALOG_INPUT6
130 }
131 #[doc = "Checks if the value of the field is `ANALOG_INPUT7`"]
132 #[inline(always)]
133 pub fn is_analog_input7(&self) -> bool {
134 *self == PSELP_A::ANALOG_INPUT7
135 }
136 #[doc = "Checks if the value of the field is `VDD`"]
137 #[inline(always)]
138 pub fn is_vdd(&self) -> bool {
139 *self == PSELP_A::VDD
140 }
141 #[doc = "Checks if the value of the field is `VDDHDIV5`"]
142 #[inline(always)]
143 pub fn is_vddhdiv5(&self) -> bool {
144 *self == PSELP_A::VDDHDIV5
145 }
146}
147#[doc = "Field `PSELP` writer - Analog positive input channel"]
148pub type PSELP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PSELP_SPEC, u8, PSELP_A, 5, O>;
149impl<'a, const O: u8> PSELP_W<'a, O> {
150 #[doc = "Not connected"]
151 #[inline(always)]
152 pub fn nc(self) -> &'a mut W {
153 self.variant(PSELP_A::NC)
154 }
155 #[doc = "AIN0"]
156 #[inline(always)]
157 pub fn analog_input0(self) -> &'a mut W {
158 self.variant(PSELP_A::ANALOG_INPUT0)
159 }
160 #[doc = "AIN1"]
161 #[inline(always)]
162 pub fn analog_input1(self) -> &'a mut W {
163 self.variant(PSELP_A::ANALOG_INPUT1)
164 }
165 #[doc = "AIN2"]
166 #[inline(always)]
167 pub fn analog_input2(self) -> &'a mut W {
168 self.variant(PSELP_A::ANALOG_INPUT2)
169 }
170 #[doc = "AIN3"]
171 #[inline(always)]
172 pub fn analog_input3(self) -> &'a mut W {
173 self.variant(PSELP_A::ANALOG_INPUT3)
174 }
175 #[doc = "AIN4"]
176 #[inline(always)]
177 pub fn analog_input4(self) -> &'a mut W {
178 self.variant(PSELP_A::ANALOG_INPUT4)
179 }
180 #[doc = "AIN5"]
181 #[inline(always)]
182 pub fn analog_input5(self) -> &'a mut W {
183 self.variant(PSELP_A::ANALOG_INPUT5)
184 }
185 #[doc = "AIN6"]
186 #[inline(always)]
187 pub fn analog_input6(self) -> &'a mut W {
188 self.variant(PSELP_A::ANALOG_INPUT6)
189 }
190 #[doc = "AIN7"]
191 #[inline(always)]
192 pub fn analog_input7(self) -> &'a mut W {
193 self.variant(PSELP_A::ANALOG_INPUT7)
194 }
195 #[doc = "VDD"]
196 #[inline(always)]
197 pub fn vdd(self) -> &'a mut W {
198 self.variant(PSELP_A::VDD)
199 }
200 #[doc = "VDDH/5"]
201 #[inline(always)]
202 pub fn vddhdiv5(self) -> &'a mut W {
203 self.variant(PSELP_A::VDDHDIV5)
204 }
205}
206impl R {
207 #[doc = "Bits 0:4 - Analog positive input channel"]
208 #[inline(always)]
209 pub fn pselp(&self) -> PSELP_R {
210 PSELP_R::new((self.bits & 0x1f) as u8)
211 }
212}
213impl W {
214 #[doc = "Bits 0:4 - Analog positive input channel"]
215 #[inline(always)]
216 pub fn pselp(&mut self) -> PSELP_W<0> {
217 PSELP_W::new(self)
218 }
219 #[doc = "Writes raw bits to the register."]
220 #[inline(always)]
221 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
222 self.0.bits(bits);
223 self
224 }
225}
226#[doc = "Description cluster\\[n\\]: Input positive pin selection for CH\\[n\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pselp](index.html) module"]
227pub struct PSELP_SPEC;
228impl crate::RegisterSpec for PSELP_SPEC {
229 type Ux = u32;
230}
231#[doc = "`read()` method returns [pselp::R](R) reader structure"]
232impl crate::Readable for PSELP_SPEC {
233 type Reader = R;
234}
235#[doc = "`write(|w| ..)` method takes [pselp::W](W) writer structure"]
236impl crate::Writable for PSELP_SPEC {
237 type Writer = W;
238}
239#[doc = "`reset()` method sets PSELP to value 0"]
240impl crate::Resettable for PSELP_SPEC {
241 #[inline(always)]
242 fn reset_value() -> Self::Ux {
243 0
244 }
245}