rp2040_pac/pio0/
rxf.rs

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1#[doc = "Register `RXF%s` reader"]
2pub type R = crate::R<RXF_SPEC>;
3impl core::fmt::Debug for R {
4    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
5        write!(f, "{}", self.bits())
6    }
7}
8impl core::fmt::Debug for crate::generic::Reg<RXF_SPEC> {
9    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
10        core::fmt::Debug::fmt(&self.read(), f)
11    }
12}
13#[doc = "Direct read access to the RX FIFO for this state machine. Each read pops one word from the FIFO. Attempting to read from an empty FIFO has no effect on the FIFO state, and sets the sticky FDEBUG_RXUNDER error flag for this FIFO. The data returned to the system on a read from an empty FIFO is undefined.  
14
15You can [`read`](crate::generic::Reg::read) this register and get [`rxf::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
16pub struct RXF_SPEC;
17impl crate::RegisterSpec for RXF_SPEC {
18    type Ux = u32;
19}
20#[doc = "`read()` method returns [`rxf::R`](R) reader structure"]
21impl crate::Readable for RXF_SPEC {}
22#[doc = "`reset()` method sets RXF%s to value 0"]
23impl crate::Resettable for RXF_SPEC {
24    const RESET_VALUE: u32 = 0;
25}
rp2040_pac/pio0/rxf.rs

rp2040_pac/pio0/
rxf.rs
