rp2040_pac/xip_ssi/
rx_sample_dly.rs
1#[doc = "Register `RX_SAMPLE_DLY` reader"]
2pub type R = crate::R<RX_SAMPLE_DLY_SPEC>;
3#[doc = "Register `RX_SAMPLE_DLY` writer"]
4pub type W = crate::W<RX_SAMPLE_DLY_SPEC>;
5#[doc = "Field `RSD` reader - RXD sample delay (in SCLK cycles)"]
6pub type RSD_R = crate::FieldReader;
7#[doc = "Field `RSD` writer - RXD sample delay (in SCLK cycles)"]
8pub type RSD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9impl R {
10 #[doc = "Bits 0:7 - RXD sample delay (in SCLK cycles)"]
11 #[inline(always)]
12 pub fn rsd(&self) -> RSD_R {
13 RSD_R::new((self.bits & 0xff) as u8)
14 }
15}
16impl W {
17 #[doc = "Bits 0:7 - RXD sample delay (in SCLK cycles)"]
18 #[inline(always)]
19 #[must_use]
20 pub fn rsd(&mut self) -> RSD_W<RX_SAMPLE_DLY_SPEC> {
21 RSD_W::new(self, 0)
22 }
23 #[doc = r" Writes raw bits to the register."]
24 #[doc = r""]
25 #[doc = r" # Safety"]
26 #[doc = r""]
27 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
28 #[inline(always)]
29 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
30 self.bits = bits;
31 self
32 }
33}
34#[doc = "RX sample delay
35
36You can [`read`](crate::generic::Reg::read) this register and get [`rx_sample_dly::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rx_sample_dly::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
37pub struct RX_SAMPLE_DLY_SPEC;
38impl crate::RegisterSpec for RX_SAMPLE_DLY_SPEC {
39 type Ux = u32;
40}
41#[doc = "`read()` method returns [`rx_sample_dly::R`](R) reader structure"]
42impl crate::Readable for RX_SAMPLE_DLY_SPEC {}
43#[doc = "`write(|w| ..)` method takes [`rx_sample_dly::W`](W) writer structure"]
44impl crate::Writable for RX_SAMPLE_DLY_SPEC {
45 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
46 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
47}
48#[doc = "`reset()` method sets RX_SAMPLE_DLY to value 0"]
49impl crate::Resettable for RX_SAMPLE_DLY_SPEC {
50 const RESET_VALUE: u32 = 0;
51}