1#[doc = "PGC"]
2#[repr(C)]
3pub struct RegisterBlock {
4 _reserved0: [u8; 0x0220],
5#[doc = "PGC Mega Control Register"]
6pub MEGA_CTRL: crate::RWRegister<u32>,
7#[doc = "PGC Mega Power Up Sequence Control Register"]
8pub MEGA_PUPSCR: crate::RWRegister<u32>,
9#[doc = "PGC Mega Pull Down Sequence Control Register"]
10pub MEGA_PDNSCR: crate::RWRegister<u32>,
11#[doc = "PGC Mega Power Gating Controller Status Register"]
12pub MEGA_SR: crate::RWRegister<u32>,
13 _reserved1: [u8; 0x70],
14#[doc = "PGC CPU Control Register"]
15pub CPU_CTRL: crate::RWRegister<u32>,
16#[doc = "PGC CPU Power Up Sequence Control Register"]
17pub CPU_PUPSCR: crate::RWRegister<u32>,
18#[doc = "PGC CPU Pull Down Sequence Control Register"]
19pub CPU_PDNSCR: crate::RWRegister<u32>,
20#[doc = "PGC CPU Power Gating Controller Status Register"]
21pub CPU_SR: crate::RWRegister<u32>,
22}
23#[doc = "PGC Mega Control Register"]
24pub mod MEGA_CTRL {
25#[doc = "Power Control PCR must not change from power-down request (pdn_req) assertion until the target subsystem is completely powered up"]
26pub mod PCR {
27pub const offset: u32 = 0;
28pub const mask: u32 = 0x01 << offset;
29pub mod R {}
30pub mod W {}
31pub mod RW {
32#[doc = "Do not switch off power even if pdn_req is asserted."]
33pub const PCR_0: u32 = 0;
34#[doc = "Switch off power when pdn_req is asserted."]
35pub const PCR_1: u32 = 0x01;
36 }
37 }
38}
39#[doc = "PGC Mega Power Up Sequence Control Register"]
40pub mod MEGA_PUPSCR {
41#[doc = "After a power-up request (pup_req assertion), the PGC waits a number of IPG clocks equal to the value of SW before asserting power toggle on/off signal (switch_b)"]
42pub mod SW {
43pub const offset: u32 = 0;
44pub const mask: u32 = 0x3f << offset;
45pub mod R {}
46pub mod W {}
47pub mod RW {}
48 }
49#[doc = "After asserting power toggle on/off signal (switch_b), the PGC waits a number of IPG clocks equal to the value of SW2ISO before negating isolation"]
50pub mod SW2ISO {
51pub const offset: u32 = 8;
52pub const mask: u32 = 0x3f << offset;
53pub mod R {}
54pub mod W {}
55pub mod RW {}
56 }
57}
58#[doc = "PGC Mega Pull Down Sequence Control Register"]
59pub mod MEGA_PDNSCR {
60#[doc = "After a power-down request (pdn_req assertion), the PGC waits a number of IPG clocks equal to the value of ISO before asserting isolation"]
61pub mod ISO {
62pub const offset: u32 = 0;
63pub const mask: u32 = 0x3f << offset;
64pub mod R {}
65pub mod W {}
66pub mod RW {}
67 }
68#[doc = "After asserting isolation, the PGC waits a number of IPG clocks equal to the value of ISO2SW before negating power toggle on/off signal (switch_b)"]
69pub mod ISO2SW {
70pub const offset: u32 = 8;
71pub const mask: u32 = 0x3f << offset;
72pub mod R {}
73pub mod W {}
74pub mod RW {}
75 }
76}
77#[doc = "PGC Mega Power Gating Controller Status Register"]
78pub mod MEGA_SR {
79#[doc = "Power status"]
80pub mod PSR {
81pub const offset: u32 = 0;
82pub const mask: u32 = 0x01 << offset;
83pub mod R {}
84pub mod W {}
85pub mod RW {
86#[doc = "The target subsystem was not powered down for the previous power-down request."]
87pub const PSR_0: u32 = 0;
88#[doc = "The target subsystem was powered down for the previous power-down request."]
89pub const PSR_1: u32 = 0x01;
90 }
91 }
92}
93#[doc = "PGC CPU Control Register"]
94pub mod CPU_CTRL {
95#[doc = "Power Control PCR must not change from power-down request (pdn_req) assertion until the target subsystem is completely powered up"]
96pub mod PCR {
97pub const offset: u32 = 0;
98pub const mask: u32 = 0x01 << offset;
99pub mod R {}
100pub mod W {}
101pub mod RW {
102#[doc = "Do not switch off power even if pdn_req is asserted."]
103pub const PCR_0: u32 = 0;
104#[doc = "Switch off power when pdn_req is asserted."]
105pub const PCR_1: u32 = 0x01;
106 }
107 }
108}
109#[doc = "PGC CPU Power Up Sequence Control Register"]
110pub mod CPU_PUPSCR {
111#[doc = "There are two different silicon revisions: 1"]
112pub mod SW {
113pub const offset: u32 = 0;
114pub const mask: u32 = 0x3f << offset;
115pub mod R {}
116pub mod W {}
117pub mod RW {}
118 }
119#[doc = "There are two different silicon revisions: 1"]
120pub mod SW2ISO {
121pub const offset: u32 = 8;
122pub const mask: u32 = 0x3f << offset;
123pub mod R {}
124pub mod W {}
125pub mod RW {}
126 }
127}
128#[doc = "PGC CPU Pull Down Sequence Control Register"]
129pub mod CPU_PDNSCR {
130#[doc = "After a power-down request (pdn_req assertion), the PGC waits a number of 32k clocks equal to the value of ISO before asserting isolation"]
131pub mod ISO {
132pub const offset: u32 = 0;
133pub const mask: u32 = 0x3f << offset;
134pub mod R {}
135pub mod W {}
136pub mod RW {}
137 }
138#[doc = "After asserting isolation, the PGC waits a number of 32k clocks equal to the value of ISO2SW before negating"]
139pub mod ISO2SW {
140pub const offset: u32 = 8;
141pub const mask: u32 = 0x3f << offset;
142pub mod R {}
143pub mod W {}
144pub mod RW {}
145 }
146}
147#[doc = "PGC CPU Power Gating Controller Status Register"]
148pub mod CPU_SR {
149#[doc = "Power status"]
150pub mod PSR {
151pub const offset: u32 = 0;
152pub const mask: u32 = 0x01 << offset;
153pub mod R {}
154pub mod W {}
155pub mod RW {
156#[doc = "The target subsystem was not powered down for the previous power-down request."]
157pub const PSR_0: u32 = 0;
158#[doc = "The target subsystem was powered down for the previous power-down request."]
159pub const PSR_1: u32 = 0x01;
160 }
161 }
162}