rp2040_pac/sio/
interp1_pop_full.rs
1#[doc = "Register `INTERP1_POP_FULL` reader"]
2pub type R = crate::R<INTERP1_POP_FULL_SPEC>;
3impl core::fmt::Debug for R {
4 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
5 write!(f, "{}", self.bits())
6 }
7}
8impl core::fmt::Debug for crate::generic::Reg<INTERP1_POP_FULL_SPEC> {
9 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
10 core::fmt::Debug::fmt(&self.read(), f)
11 }
12}
13#[doc = "Read FULL result, and simultaneously write lane results to both accumulators (POP).
14
15You can [`read`](crate::generic::Reg::read) this register and get [`interp1_pop_full::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
16pub struct INTERP1_POP_FULL_SPEC;
17impl crate::RegisterSpec for INTERP1_POP_FULL_SPEC {
18 type Ux = u32;
19}
20#[doc = "`read()` method returns [`interp1_pop_full::R`](R) reader structure"]
21impl crate::Readable for INTERP1_POP_FULL_SPEC {}
22#[doc = "`reset()` method sets INTERP1_POP_FULL to value 0"]
23impl crate::Resettable for INTERP1_POP_FULL_SPEC {
24 const RESET_VALUE: u32 = 0;
25}