rp2040_pac/ppb/
nvic_icpr.rs

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1#[doc = "Register `NVIC_ICPR` reader"]
2pub type R = crate::R<NVIC_ICPR_SPEC>;
3#[doc = "Register `NVIC_ICPR` writer"]
4pub type W = crate::W<NVIC_ICPR_SPEC>;
5#[doc = "Field `CLRPEND` reader - Interrupt clear-pending bits.  
6 Write:  
7 0 = No effect.  
8 1 = Removes pending state and interrupt.  
9 Read:  
10 0 = Interrupt is not pending.  
11 1 = Interrupt is pending."]
12pub type CLRPEND_R = crate::FieldReader<u32>;
13#[doc = "Field `CLRPEND` writer - Interrupt clear-pending bits.  
14 Write:  
15 0 = No effect.  
16 1 = Removes pending state and interrupt.  
17 Read:  
18 0 = Interrupt is not pending.  
19 1 = Interrupt is pending."]
20pub type CLRPEND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
21impl R {
22    #[doc = "Bits 0:31 - Interrupt clear-pending bits.  
23 Write:  
24 0 = No effect.  
25 1 = Removes pending state and interrupt.  
26 Read:  
27 0 = Interrupt is not pending.  
28 1 = Interrupt is pending."]
29    #[inline(always)]
30    pub fn clrpend(&self) -> CLRPEND_R {
31        CLRPEND_R::new(self.bits)
32    }
33}
34impl W {
35    #[doc = "Bits 0:31 - Interrupt clear-pending bits.  
36 Write:  
37 0 = No effect.  
38 1 = Removes pending state and interrupt.  
39 Read:  
40 0 = Interrupt is not pending.  
41 1 = Interrupt is pending."]
42    #[inline(always)]
43    #[must_use]
44    pub fn clrpend(&mut self) -> CLRPEND_W<NVIC_ICPR_SPEC> {
45        CLRPEND_W::new(self, 0)
46    }
47    #[doc = r" Writes raw bits to the register."]
48    #[doc = r""]
49    #[doc = r" # Safety"]
50    #[doc = r""]
51    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
52    #[inline(always)]
53    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
54        self.bits = bits;
55        self
56    }
57}
58#[doc = "Use the Interrupt Clear-Pending Register to clear pending interrupts and determine which interrupts are currently pending.  
59
60You can [`read`](crate::generic::Reg::read) this register and get [`nvic_icpr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`nvic_icpr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct NVIC_ICPR_SPEC;
62impl crate::RegisterSpec for NVIC_ICPR_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`nvic_icpr::R`](R) reader structure"]
66impl crate::Readable for NVIC_ICPR_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`nvic_icpr::W`](W) writer structure"]
68impl crate::Writable for NVIC_ICPR_SPEC {
69    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
70    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71}
72#[doc = "`reset()` method sets NVIC_ICPR to value 0"]
73impl crate::Resettable for NVIC_ICPR_SPEC {
74    const RESET_VALUE: u32 = 0;
75}
rp2040_pac/ppb/nvic_icpr.rs

rp2040_pac/ppb/
nvic_icpr.rs
