rp2040_pac/i2c0/
ic_clr_intr.rs

1#[doc = "Register `IC_CLR_INTR` reader"]
2pub type R = crate::R<IC_CLR_INTR_SPEC>;
3#[doc = "Field `CLR_INTR` reader - Read this register to clear the combined interrupt, all individual interrupts, and the IC_TX_ABRT_SOURCE register. This bit does not clear hardware clearable interrupts but software clearable interrupts. Refer to Bit 9 of the IC_TX_ABRT_SOURCE register for an exception to clearing IC_TX_ABRT_SOURCE.  
4
5 Reset value: 0x0"]
6pub type CLR_INTR_R = crate::BitReader;
7impl R {
8    #[doc = "Bit 0 - Read this register to clear the combined interrupt, all individual interrupts, and the IC_TX_ABRT_SOURCE register. This bit does not clear hardware clearable interrupts but software clearable interrupts. Refer to Bit 9 of the IC_TX_ABRT_SOURCE register for an exception to clearing IC_TX_ABRT_SOURCE.  
9
10 Reset value: 0x0"]
11    #[inline(always)]
12    pub fn clr_intr(&self) -> CLR_INTR_R {
13        CLR_INTR_R::new((self.bits & 1) != 0)
14    }
15}
16#[doc = "Clear Combined and Individual Interrupt Register  
17
18You can [`read`](crate::generic::Reg::read) this register and get [`ic_clr_intr::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct IC_CLR_INTR_SPEC;
20impl crate::RegisterSpec for IC_CLR_INTR_SPEC {
21    type Ux = u32;
22}
23#[doc = "`read()` method returns [`ic_clr_intr::R`](R) reader structure"]
24impl crate::Readable for IC_CLR_INTR_SPEC {}
25#[doc = "`reset()` method sets IC_CLR_INTR to value 0"]
26impl crate::Resettable for IC_CLR_INTR_SPEC {
27    const RESET_VALUE: u32 = 0;
28}