rp2040_pac/i2c0/
ic_slv_data_nack_only.rs

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1#[doc = "Register `IC_SLV_DATA_NACK_ONLY` reader"]
2pub type R = crate::R<IC_SLV_DATA_NACK_ONLY_SPEC>;
3#[doc = "Register `IC_SLV_DATA_NACK_ONLY` writer"]
4pub type W = crate::W<IC_SLV_DATA_NACK_ONLY_SPEC>;
5#[doc = "Field `NACK` reader - Generate NACK. This NACK generation only occurs when DW_apb_i2c is a slave-receiver. If this register is set to a value of 1, it can only generate a NACK after a data byte is received; hence, the data transfer is aborted and the data received is not pushed to the receive buffer.  
6
7 When the register is set to a value of 0, it generates NACK/ACK, depending on normal criteria. - 1: generate NACK after data byte received - 0: generate NACK/ACK normally Reset value: 0x0"]
8pub type NACK_R = crate::BitReader<NACK_A>;
9#[doc = "Generate NACK. This NACK generation only occurs when DW_apb_i2c is a slave-receiver. If this register is set to a value of 1, it can only generate a NACK after a data byte is received; hence, the data transfer is aborted and the data received is not pushed to the receive buffer.  
10
11 When the register is set to a value of 0, it generates NACK/ACK, depending on normal criteria. - 1: generate NACK after data byte received - 0: generate NACK/ACK normally Reset value: 0x0  
12
13Value on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15pub enum NACK_A {
16    #[doc = "0: Slave receiver generates NACK normally"]
17    DISABLED = 0,
18    #[doc = "1: Slave receiver generates NACK upon data reception only"]
19    ENABLED = 1,
20}
21impl From<NACK_A> for bool {
22    #[inline(always)]
23    fn from(variant: NACK_A) -> Self {
24        variant as u8 != 0
25    }
26}
27impl NACK_R {
28    #[doc = "Get enumerated values variant"]
29    #[inline(always)]
30    pub const fn variant(&self) -> NACK_A {
31        match self.bits {
32            false => NACK_A::DISABLED,
33            true => NACK_A::ENABLED,
34        }
35    }
36    #[doc = "Slave receiver generates NACK normally"]
37    #[inline(always)]
38    pub fn is_disabled(&self) -> bool {
39        *self == NACK_A::DISABLED
40    }
41    #[doc = "Slave receiver generates NACK upon data reception only"]
42    #[inline(always)]
43    pub fn is_enabled(&self) -> bool {
44        *self == NACK_A::ENABLED
45    }
46}
47#[doc = "Field `NACK` writer - Generate NACK. This NACK generation only occurs when DW_apb_i2c is a slave-receiver. If this register is set to a value of 1, it can only generate a NACK after a data byte is received; hence, the data transfer is aborted and the data received is not pushed to the receive buffer.  
48
49 When the register is set to a value of 0, it generates NACK/ACK, depending on normal criteria. - 1: generate NACK after data byte received - 0: generate NACK/ACK normally Reset value: 0x0"]
50pub type NACK_W<'a, REG> = crate::BitWriter<'a, REG, NACK_A>;
51impl<'a, REG> NACK_W<'a, REG>
52where
53    REG: crate::Writable + crate::RegisterSpec,
54{
55    #[doc = "Slave receiver generates NACK normally"]
56    #[inline(always)]
57    pub fn disabled(self) -> &'a mut crate::W<REG> {
58        self.variant(NACK_A::DISABLED)
59    }
60    #[doc = "Slave receiver generates NACK upon data reception only"]
61    #[inline(always)]
62    pub fn enabled(self) -> &'a mut crate::W<REG> {
63        self.variant(NACK_A::ENABLED)
64    }
65}
66impl R {
67    #[doc = "Bit 0 - Generate NACK. This NACK generation only occurs when DW_apb_i2c is a slave-receiver. If this register is set to a value of 1, it can only generate a NACK after a data byte is received; hence, the data transfer is aborted and the data received is not pushed to the receive buffer.  
68
69 When the register is set to a value of 0, it generates NACK/ACK, depending on normal criteria. - 1: generate NACK after data byte received - 0: generate NACK/ACK normally Reset value: 0x0"]
70    #[inline(always)]
71    pub fn nack(&self) -> NACK_R {
72        NACK_R::new((self.bits & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bit 0 - Generate NACK. This NACK generation only occurs when DW_apb_i2c is a slave-receiver. If this register is set to a value of 1, it can only generate a NACK after a data byte is received; hence, the data transfer is aborted and the data received is not pushed to the receive buffer.  
77
78 When the register is set to a value of 0, it generates NACK/ACK, depending on normal criteria. - 1: generate NACK after data byte received - 0: generate NACK/ACK normally Reset value: 0x0"]
79    #[inline(always)]
80    #[must_use]
81    pub fn nack(&mut self) -> NACK_W<IC_SLV_DATA_NACK_ONLY_SPEC> {
82        NACK_W::new(self, 0)
83    }
84    #[doc = r" Writes raw bits to the register."]
85    #[doc = r""]
86    #[doc = r" # Safety"]
87    #[doc = r""]
88    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
89    #[inline(always)]
90    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
91        self.bits = bits;
92        self
93    }
94}
95#[doc = "Generate Slave Data NACK Register  
96
97 The register is used to generate a NACK for the data part of a transfer when DW_apb_i2c is acting as a slave-receiver. This register only exists when the IC_SLV_DATA_NACK_ONLY parameter is set to 1. When this parameter disabled, this register does not exist and writing to the register's address has no effect.  
98
99 A write can occur on this register if both of the following conditions are met: - DW_apb_i2c is disabled (IC_ENABLE\\[0\\]
100= 0) - Slave part is inactive (IC_STATUS\\[6\\]
101= 0) Note: The IC_STATUS\\[6\\]
102is a register read-back location for the internal slv_activity signal; the user should poll this before writing the ic_slv_data_nack_only bit.  
103
104You can [`read`](crate::generic::Reg::read) this register and get [`ic_slv_data_nack_only::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ic_slv_data_nack_only::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
105pub struct IC_SLV_DATA_NACK_ONLY_SPEC;
106impl crate::RegisterSpec for IC_SLV_DATA_NACK_ONLY_SPEC {
107    type Ux = u32;
108}
109#[doc = "`read()` method returns [`ic_slv_data_nack_only::R`](R) reader structure"]
110impl crate::Readable for IC_SLV_DATA_NACK_ONLY_SPEC {}
111#[doc = "`write(|w| ..)` method takes [`ic_slv_data_nack_only::W`](W) writer structure"]
112impl crate::Writable for IC_SLV_DATA_NACK_ONLY_SPEC {
113    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
114    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
115}
116#[doc = "`reset()` method sets IC_SLV_DATA_NACK_ONLY to value 0"]
117impl crate::Resettable for IC_SLV_DATA_NACK_ONLY_SPEC {
118    const RESET_VALUE: u32 = 0;
119}
rp2040_pac/i2c0/ic_slv_data_nack_only.rs

rp2040_pac/i2c0/
ic_slv_data_nack_only.rs
