1#[doc = "Register `SM_SHIFTCTRL` reader"]
2pub type R = crate::R<SM_SHIFTCTRL_SPEC>;
3#[doc = "Register `SM_SHIFTCTRL` writer"]
4pub type W = crate::W<SM_SHIFTCTRL_SPEC>;
5#[doc = "Field `AUTOPUSH` reader - Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH."]
6pub type AUTOPUSH_R = crate::BitReader;
7#[doc = "Field `AUTOPUSH` writer - Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH."]
8pub type AUTOPUSH_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `AUTOPULL` reader - Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH."]
10pub type AUTOPULL_R = crate::BitReader;
11#[doc = "Field `AUTOPULL` writer - Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH."]
12pub type AUTOPULL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `IN_SHIFTDIR` reader - 1 = shift input shift register to right (data enters from left). 0 = to left."]
14pub type IN_SHIFTDIR_R = crate::BitReader;
15#[doc = "Field `IN_SHIFTDIR` writer - 1 = shift input shift register to right (data enters from left). 0 = to left."]
16pub type IN_SHIFTDIR_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `OUT_SHIFTDIR` reader - 1 = shift out of output shift register to right. 0 = to left."]
18pub type OUT_SHIFTDIR_R = crate::BitReader;
19#[doc = "Field `OUT_SHIFTDIR` writer - 1 = shift out of output shift register to right. 0 = to left."]
20pub type OUT_SHIFTDIR_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PUSH_THRESH` reader - Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
22 Write 0 for value of 32."]
23pub type PUSH_THRESH_R = crate::FieldReader;
24#[doc = "Field `PUSH_THRESH` writer - Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
25 Write 0 for value of 32."]
26pub type PUSH_THRESH_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
27#[doc = "Field `PULL_THRESH` reader - Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
28 Write 0 for value of 32."]
29pub type PULL_THRESH_R = crate::FieldReader;
30#[doc = "Field `PULL_THRESH` writer - Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
31 Write 0 for value of 32."]
32pub type PULL_THRESH_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
33#[doc = "Field `FJOIN_TX` reader - When 1, TX FIFO steals the RX FIFO's storage, and becomes twice as deep.
34 RX FIFO is disabled as a result (always reads as both full and empty).
35 FIFOs are flushed when this bit is changed."]
36pub type FJOIN_TX_R = crate::BitReader;
37#[doc = "Field `FJOIN_TX` writer - When 1, TX FIFO steals the RX FIFO's storage, and becomes twice as deep.
38 RX FIFO is disabled as a result (always reads as both full and empty).
39 FIFOs are flushed when this bit is changed."]
40pub type FJOIN_TX_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `FJOIN_RX` reader - When 1, RX FIFO steals the TX FIFO's storage, and becomes twice as deep.
42 TX FIFO is disabled as a result (always reads as both full and empty).
43 FIFOs are flushed when this bit is changed."]
44pub type FJOIN_RX_R = crate::BitReader;
45#[doc = "Field `FJOIN_RX` writer - When 1, RX FIFO steals the TX FIFO's storage, and becomes twice as deep.
46 TX FIFO is disabled as a result (always reads as both full and empty).
47 FIFOs are flushed when this bit is changed."]
48pub type FJOIN_RX_W<'a, REG> = crate::BitWriter<'a, REG>;
49impl R {
50#[doc = "Bit 16 - Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH."]
51 #[inline(always)]
52pub fn autopush(&self) -> AUTOPUSH_R {
53 AUTOPUSH_R::new(((self.bits >> 16) & 1) != 0)
54 }
55#[doc = "Bit 17 - Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH."]
56 #[inline(always)]
57pub fn autopull(&self) -> AUTOPULL_R {
58 AUTOPULL_R::new(((self.bits >> 17) & 1) != 0)
59 }
60#[doc = "Bit 18 - 1 = shift input shift register to right (data enters from left). 0 = to left."]
61 #[inline(always)]
62pub fn in_shiftdir(&self) -> IN_SHIFTDIR_R {
63 IN_SHIFTDIR_R::new(((self.bits >> 18) & 1) != 0)
64 }
65#[doc = "Bit 19 - 1 = shift out of output shift register to right. 0 = to left."]
66 #[inline(always)]
67pub fn out_shiftdir(&self) -> OUT_SHIFTDIR_R {
68 OUT_SHIFTDIR_R::new(((self.bits >> 19) & 1) != 0)
69 }
70#[doc = "Bits 20:24 - Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
71 Write 0 for value of 32."]
72 #[inline(always)]
73pub fn push_thresh(&self) -> PUSH_THRESH_R {
74 PUSH_THRESH_R::new(((self.bits >> 20) & 0x1f) as u8)
75 }
76#[doc = "Bits 25:29 - Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
77 Write 0 for value of 32."]
78 #[inline(always)]
79pub fn pull_thresh(&self) -> PULL_THRESH_R {
80 PULL_THRESH_R::new(((self.bits >> 25) & 0x1f) as u8)
81 }
82#[doc = "Bit 30 - When 1, TX FIFO steals the RX FIFO's storage, and becomes twice as deep.
83 RX FIFO is disabled as a result (always reads as both full and empty).
84 FIFOs are flushed when this bit is changed."]
85 #[inline(always)]
86pub fn fjoin_tx(&self) -> FJOIN_TX_R {
87 FJOIN_TX_R::new(((self.bits >> 30) & 1) != 0)
88 }
89#[doc = "Bit 31 - When 1, RX FIFO steals the TX FIFO's storage, and becomes twice as deep.
90 TX FIFO is disabled as a result (always reads as both full and empty).
91 FIFOs are flushed when this bit is changed."]
92 #[inline(always)]
93pub fn fjoin_rx(&self) -> FJOIN_RX_R {
94 FJOIN_RX_R::new(((self.bits >> 31) & 1) != 0)
95 }
96}
97impl W {
98#[doc = "Bit 16 - Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH."]
99 #[inline(always)]
100 #[must_use]
101pub fn autopush(&mut self) -> AUTOPUSH_W<SM_SHIFTCTRL_SPEC> {
102 AUTOPUSH_W::new(self, 16)
103 }
104#[doc = "Bit 17 - Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH."]
105 #[inline(always)]
106 #[must_use]
107pub fn autopull(&mut self) -> AUTOPULL_W<SM_SHIFTCTRL_SPEC> {
108 AUTOPULL_W::new(self, 17)
109 }
110#[doc = "Bit 18 - 1 = shift input shift register to right (data enters from left). 0 = to left."]
111 #[inline(always)]
112 #[must_use]
113pub fn in_shiftdir(&mut self) -> IN_SHIFTDIR_W<SM_SHIFTCTRL_SPEC> {
114 IN_SHIFTDIR_W::new(self, 18)
115 }
116#[doc = "Bit 19 - 1 = shift out of output shift register to right. 0 = to left."]
117 #[inline(always)]
118 #[must_use]
119pub fn out_shiftdir(&mut self) -> OUT_SHIFTDIR_W<SM_SHIFTCTRL_SPEC> {
120 OUT_SHIFTDIR_W::new(self, 19)
121 }
122#[doc = "Bits 20:24 - Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place.
123 Write 0 for value of 32."]
124 #[inline(always)]
125 #[must_use]
126pub fn push_thresh(&mut self) -> PUSH_THRESH_W<SM_SHIFTCTRL_SPEC> {
127 PUSH_THRESH_W::new(self, 20)
128 }
129#[doc = "Bits 25:29 - Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place.
130 Write 0 for value of 32."]
131 #[inline(always)]
132 #[must_use]
133pub fn pull_thresh(&mut self) -> PULL_THRESH_W<SM_SHIFTCTRL_SPEC> {
134 PULL_THRESH_W::new(self, 25)
135 }
136#[doc = "Bit 30 - When 1, TX FIFO steals the RX FIFO's storage, and becomes twice as deep.
137 RX FIFO is disabled as a result (always reads as both full and empty).
138 FIFOs are flushed when this bit is changed."]
139 #[inline(always)]
140 #[must_use]
141pub fn fjoin_tx(&mut self) -> FJOIN_TX_W<SM_SHIFTCTRL_SPEC> {
142 FJOIN_TX_W::new(self, 30)
143 }
144#[doc = "Bit 31 - When 1, RX FIFO steals the TX FIFO's storage, and becomes twice as deep.
145 TX FIFO is disabled as a result (always reads as both full and empty).
146 FIFOs are flushed when this bit is changed."]
147 #[inline(always)]
148 #[must_use]
149pub fn fjoin_rx(&mut self) -> FJOIN_RX_W<SM_SHIFTCTRL_SPEC> {
150 FJOIN_RX_W::new(self, 31)
151 }
152#[doc = r" Writes raw bits to the register."]
153 #[doc = r""]
154 #[doc = r" # Safety"]
155 #[doc = r""]
156 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
157 #[inline(always)]
158pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
159self.bits = bits;
160self
161}
162}
163#[doc = "Control behaviour of the input/output shift registers for state machine 0
164165You can [`read`](crate::generic::Reg::read) this register and get [`sm_shiftctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sm_shiftctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
166pub struct SM_SHIFTCTRL_SPEC;
167impl crate::RegisterSpec for SM_SHIFTCTRL_SPEC {
168type Ux = u32;
169}
170#[doc = "`read()` method returns [`sm_shiftctrl::R`](R) reader structure"]
171impl crate::Readable for SM_SHIFTCTRL_SPEC {}
172#[doc = "`write(|w| ..)` method takes [`sm_shiftctrl::W`](W) writer structure"]
173impl crate::Writable for SM_SHIFTCTRL_SPEC {
174const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
175const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
176}
177#[doc = "`reset()` method sets SM_SHIFTCTRL to value 0x000c_0000"]
178impl crate::Resettable for SM_SHIFTCTRL_SPEC {
179const RESET_VALUE: u32 = 0x000c_0000;
180}