1#[doc = "Register `EP_BUFFER_CONTROL%s` reader"]
2pub type R = crate::R<EP_BUFFER_CONTROL_SPEC>;
3#[doc = "Register `EP_BUFFER_CONTROL%s` writer"]
4pub type W = crate::W<EP_BUFFER_CONTROL_SPEC>;
5#[doc = "Field `LENGTH_0` reader - The length of the data in buffer 0."]
6pub type LENGTH_0_R = crate::FieldReader<u16>;
7#[doc = "Field `LENGTH_0` writer - The length of the data in buffer 0."]
8pub type LENGTH_0_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9#[doc = "Field `AVAILABLE_0` reader - Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back."]
10pub type AVAILABLE_0_R = crate::BitReader;
11#[doc = "Field `AVAILABLE_0` writer - Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back."]
12pub type AVAILABLE_0_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `STALL` reader - Reply with a stall (valid for both buffers)."]
14pub type STALL_R = crate::BitReader;
15#[doc = "Field `STALL` writer - Reply with a stall (valid for both buffers)."]
16pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RESET` reader - Reset the buffer selector to buffer 0."]
18pub type RESET_R = crate::BitReader;
19#[doc = "Field `RESET` writer - Reset the buffer selector to buffer 0."]
20pub type RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PID_0` reader - The data pid of buffer 0."]
22pub type PID_0_R = crate::BitReader;
23#[doc = "Field `PID_0` writer - The data pid of buffer 0."]
24pub type PID_0_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `LAST_0` reader - Buffer 0 is the last buffer of the transfer."]
26pub type LAST_0_R = crate::BitReader;
27#[doc = "Field `LAST_0` writer - Buffer 0 is the last buffer of the transfer."]
28pub type LAST_0_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `FULL_0` reader - Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data."]
30pub type FULL_0_R = crate::BitReader;
31#[doc = "Field `FULL_0` writer - Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data."]
32pub type FULL_0_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `LENGTH_1` reader - The length of the data in buffer 1."]
34pub type LENGTH_1_R = crate::FieldReader<u16>;
35#[doc = "Field `LENGTH_1` writer - The length of the data in buffer 1."]
36pub type LENGTH_1_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
37#[doc = "Field `AVAILABLE_1` reader - Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back."]
38pub type AVAILABLE_1_R = crate::BitReader;
39#[doc = "Field `AVAILABLE_1` writer - Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back."]
40pub type AVAILABLE_1_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `DOUBLE_BUFFER_ISO_OFFSET` reader - The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
42 For a non Isochronous endpoint the offset is always 64 bytes."]
43pub type DOUBLE_BUFFER_ISO_OFFSET_R = crate::FieldReader<DOUBLE_BUFFER_ISO_OFFSET_A>;
44#[doc = "The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
45 For a non Isochronous endpoint the offset is always 64 bytes.
4647Value on reset: 0"]
48#[derive(Clone, Copy, Debug, PartialEq, Eq)]
49#[repr(u8)]
50pub enum DOUBLE_BUFFER_ISO_OFFSET_A {
51#[doc = "0: `0`"]
52_128 = 0,
53#[doc = "1: `1`"]
54_256 = 1,
55#[doc = "2: `10`"]
56_512 = 2,
57#[doc = "3: `11`"]
58_1024 = 3,
59}
60impl From<DOUBLE_BUFFER_ISO_OFFSET_A> for u8 {
61#[inline(always)]
62fn from(variant: DOUBLE_BUFFER_ISO_OFFSET_A) -> Self {
63 variant as _
64}
65}
66impl crate::FieldSpec for DOUBLE_BUFFER_ISO_OFFSET_A {
67type Ux = u8;
68}
69impl DOUBLE_BUFFER_ISO_OFFSET_R {
70#[doc = "Get enumerated values variant"]
71 #[inline(always)]
72pub const fn variant(&self) -> DOUBLE_BUFFER_ISO_OFFSET_A {
73match self.bits {
740 => DOUBLE_BUFFER_ISO_OFFSET_A::_128,
751 => DOUBLE_BUFFER_ISO_OFFSET_A::_256,
762 => DOUBLE_BUFFER_ISO_OFFSET_A::_512,
773 => DOUBLE_BUFFER_ISO_OFFSET_A::_1024,
78_ => unreachable!(),
79 }
80 }
81#[doc = "`0`"]
82 #[inline(always)]
83pub fn is_128(&self) -> bool {
84*self == DOUBLE_BUFFER_ISO_OFFSET_A::_128
85 }
86#[doc = "`1`"]
87 #[inline(always)]
88pub fn is_256(&self) -> bool {
89*self == DOUBLE_BUFFER_ISO_OFFSET_A::_256
90 }
91#[doc = "`10`"]
92 #[inline(always)]
93pub fn is_512(&self) -> bool {
94*self == DOUBLE_BUFFER_ISO_OFFSET_A::_512
95 }
96#[doc = "`11`"]
97 #[inline(always)]
98pub fn is_1024(&self) -> bool {
99*self == DOUBLE_BUFFER_ISO_OFFSET_A::_1024
100 }
101}
102#[doc = "Field `DOUBLE_BUFFER_ISO_OFFSET` writer - The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
103 For a non Isochronous endpoint the offset is always 64 bytes."]
104pub type DOUBLE_BUFFER_ISO_OFFSET_W<'a, REG> =
105crate::FieldWriterSafe<'a, REG, 2, DOUBLE_BUFFER_ISO_OFFSET_A>;
106impl<'a, REG> DOUBLE_BUFFER_ISO_OFFSET_W<'a, REG>
107where
108REG: crate::Writable + crate::RegisterSpec,
109 REG::Ux: From<u8>,
110{
111#[doc = "`0`"]
112 #[inline(always)]
113pub fn _128(self) -> &'a mut crate::W<REG> {
114self.variant(DOUBLE_BUFFER_ISO_OFFSET_A::_128)
115 }
116#[doc = "`1`"]
117 #[inline(always)]
118pub fn _256(self) -> &'a mut crate::W<REG> {
119self.variant(DOUBLE_BUFFER_ISO_OFFSET_A::_256)
120 }
121#[doc = "`10`"]
122 #[inline(always)]
123pub fn _512(self) -> &'a mut crate::W<REG> {
124self.variant(DOUBLE_BUFFER_ISO_OFFSET_A::_512)
125 }
126#[doc = "`11`"]
127 #[inline(always)]
128pub fn _1024(self) -> &'a mut crate::W<REG> {
129self.variant(DOUBLE_BUFFER_ISO_OFFSET_A::_1024)
130 }
131}
132#[doc = "Field `PID_1` reader - The data pid of buffer 1."]
133pub type PID_1_R = crate::BitReader;
134#[doc = "Field `PID_1` writer - The data pid of buffer 1."]
135pub type PID_1_W<'a, REG> = crate::BitWriter<'a, REG>;
136#[doc = "Field `LAST_1` reader - Buffer 1 is the last buffer of the transfer."]
137pub type LAST_1_R = crate::BitReader;
138#[doc = "Field `LAST_1` writer - Buffer 1 is the last buffer of the transfer."]
139pub type LAST_1_W<'a, REG> = crate::BitWriter<'a, REG>;
140#[doc = "Field `FULL_1` reader - Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data."]
141pub type FULL_1_R = crate::BitReader;
142#[doc = "Field `FULL_1` writer - Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data."]
143pub type FULL_1_W<'a, REG> = crate::BitWriter<'a, REG>;
144impl R {
145#[doc = "Bits 0:9 - The length of the data in buffer 0."]
146 #[inline(always)]
147pub fn length_0(&self) -> LENGTH_0_R {
148 LENGTH_0_R::new((self.bits & 0x03ff) as u16)
149 }
150#[doc = "Bit 10 - Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back."]
151 #[inline(always)]
152pub fn available_0(&self) -> AVAILABLE_0_R {
153 AVAILABLE_0_R::new(((self.bits >> 10) & 1) != 0)
154 }
155#[doc = "Bit 11 - Reply with a stall (valid for both buffers)."]
156 #[inline(always)]
157pub fn stall(&self) -> STALL_R {
158 STALL_R::new(((self.bits >> 11) & 1) != 0)
159 }
160#[doc = "Bit 12 - Reset the buffer selector to buffer 0."]
161 #[inline(always)]
162pub fn reset(&self) -> RESET_R {
163 RESET_R::new(((self.bits >> 12) & 1) != 0)
164 }
165#[doc = "Bit 13 - The data pid of buffer 0."]
166 #[inline(always)]
167pub fn pid_0(&self) -> PID_0_R {
168 PID_0_R::new(((self.bits >> 13) & 1) != 0)
169 }
170#[doc = "Bit 14 - Buffer 0 is the last buffer of the transfer."]
171 #[inline(always)]
172pub fn last_0(&self) -> LAST_0_R {
173 LAST_0_R::new(((self.bits >> 14) & 1) != 0)
174 }
175#[doc = "Bit 15 - Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data."]
176 #[inline(always)]
177pub fn full_0(&self) -> FULL_0_R {
178 FULL_0_R::new(((self.bits >> 15) & 1) != 0)
179 }
180#[doc = "Bits 16:25 - The length of the data in buffer 1."]
181 #[inline(always)]
182pub fn length_1(&self) -> LENGTH_1_R {
183 LENGTH_1_R::new(((self.bits >> 16) & 0x03ff) as u16)
184 }
185#[doc = "Bit 26 - Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back."]
186 #[inline(always)]
187pub fn available_1(&self) -> AVAILABLE_1_R {
188 AVAILABLE_1_R::new(((self.bits >> 26) & 1) != 0)
189 }
190#[doc = "Bits 27:28 - The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
191 For a non Isochronous endpoint the offset is always 64 bytes."]
192 #[inline(always)]
193pub fn double_buffer_iso_offset(&self) -> DOUBLE_BUFFER_ISO_OFFSET_R {
194 DOUBLE_BUFFER_ISO_OFFSET_R::new(((self.bits >> 27) & 3) as u8)
195 }
196#[doc = "Bit 29 - The data pid of buffer 1."]
197 #[inline(always)]
198pub fn pid_1(&self) -> PID_1_R {
199 PID_1_R::new(((self.bits >> 29) & 1) != 0)
200 }
201#[doc = "Bit 30 - Buffer 1 is the last buffer of the transfer."]
202 #[inline(always)]
203pub fn last_1(&self) -> LAST_1_R {
204 LAST_1_R::new(((self.bits >> 30) & 1) != 0)
205 }
206#[doc = "Bit 31 - Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data."]
207 #[inline(always)]
208pub fn full_1(&self) -> FULL_1_R {
209 FULL_1_R::new(((self.bits >> 31) & 1) != 0)
210 }
211}
212impl W {
213#[doc = "Bits 0:9 - The length of the data in buffer 0."]
214 #[inline(always)]
215 #[must_use]
216pub fn length_0(&mut self) -> LENGTH_0_W<EP_BUFFER_CONTROL_SPEC> {
217 LENGTH_0_W::new(self, 0)
218 }
219#[doc = "Bit 10 - Buffer 0 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back."]
220 #[inline(always)]
221 #[must_use]
222pub fn available_0(&mut self) -> AVAILABLE_0_W<EP_BUFFER_CONTROL_SPEC> {
223 AVAILABLE_0_W::new(self, 10)
224 }
225#[doc = "Bit 11 - Reply with a stall (valid for both buffers)."]
226 #[inline(always)]
227 #[must_use]
228pub fn stall(&mut self) -> STALL_W<EP_BUFFER_CONTROL_SPEC> {
229 STALL_W::new(self, 11)
230 }
231#[doc = "Bit 12 - Reset the buffer selector to buffer 0."]
232 #[inline(always)]
233 #[must_use]
234pub fn reset(&mut self) -> RESET_W<EP_BUFFER_CONTROL_SPEC> {
235 RESET_W::new(self, 12)
236 }
237#[doc = "Bit 13 - The data pid of buffer 0."]
238 #[inline(always)]
239 #[must_use]
240pub fn pid_0(&mut self) -> PID_0_W<EP_BUFFER_CONTROL_SPEC> {
241 PID_0_W::new(self, 13)
242 }
243#[doc = "Bit 14 - Buffer 0 is the last buffer of the transfer."]
244 #[inline(always)]
245 #[must_use]
246pub fn last_0(&mut self) -> LAST_0_W<EP_BUFFER_CONTROL_SPEC> {
247 LAST_0_W::new(self, 14)
248 }
249#[doc = "Bit 15 - Buffer 0 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data."]
250 #[inline(always)]
251 #[must_use]
252pub fn full_0(&mut self) -> FULL_0_W<EP_BUFFER_CONTROL_SPEC> {
253 FULL_0_W::new(self, 15)
254 }
255#[doc = "Bits 16:25 - The length of the data in buffer 1."]
256 #[inline(always)]
257 #[must_use]
258pub fn length_1(&mut self) -> LENGTH_1_W<EP_BUFFER_CONTROL_SPEC> {
259 LENGTH_1_W::new(self, 16)
260 }
261#[doc = "Bit 26 - Buffer 1 is available. This bit is set to indicate the buffer can be used by the controller. The controller clears the available bit when writing the status back."]
262 #[inline(always)]
263 #[must_use]
264pub fn available_1(&mut self) -> AVAILABLE_1_W<EP_BUFFER_CONTROL_SPEC> {
265 AVAILABLE_1_W::new(self, 26)
266 }
267#[doc = "Bits 27:28 - The number of bytes buffer 1 is offset from buffer 0 in Isochronous mode. Only valid in double buffered mode for an Isochronous endpoint.
268 For a non Isochronous endpoint the offset is always 64 bytes."]
269 #[inline(always)]
270 #[must_use]
271pub fn double_buffer_iso_offset(
272&mut self,
273 ) -> DOUBLE_BUFFER_ISO_OFFSET_W<EP_BUFFER_CONTROL_SPEC> {
274 DOUBLE_BUFFER_ISO_OFFSET_W::new(self, 27)
275 }
276#[doc = "Bit 29 - The data pid of buffer 1."]
277 #[inline(always)]
278 #[must_use]
279pub fn pid_1(&mut self) -> PID_1_W<EP_BUFFER_CONTROL_SPEC> {
280 PID_1_W::new(self, 29)
281 }
282#[doc = "Bit 30 - Buffer 1 is the last buffer of the transfer."]
283 #[inline(always)]
284 #[must_use]
285pub fn last_1(&mut self) -> LAST_1_W<EP_BUFFER_CONTROL_SPEC> {
286 LAST_1_W::new(self, 30)
287 }
288#[doc = "Bit 31 - Buffer 1 is full. For an IN transfer (TX to the host) the bit is set to indicate the data is valid. For an OUT transfer (RX from the host) this bit should be left as a 0. The host will set it when it has filled the buffer with data."]
289 #[inline(always)]
290 #[must_use]
291pub fn full_1(&mut self) -> FULL_1_W<EP_BUFFER_CONTROL_SPEC> {
292 FULL_1_W::new(self, 31)
293 }
294#[doc = r" Writes raw bits to the register."]
295 #[doc = r""]
296 #[doc = r" # Safety"]
297 #[doc = r""]
298 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
299 #[inline(always)]
300pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
301self.bits = bits;
302self
303}
304}
305#[doc = "-
306307You can [`read`](crate::generic::Reg::read) this register and get [`ep_buffer_control::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ep_buffer_control::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
308pub struct EP_BUFFER_CONTROL_SPEC;
309impl crate::RegisterSpec for EP_BUFFER_CONTROL_SPEC {
310type Ux = u32;
311}
312#[doc = "`read()` method returns [`ep_buffer_control::R`](R) reader structure"]
313impl crate::Readable for EP_BUFFER_CONTROL_SPEC {}
314#[doc = "`write(|w| ..)` method takes [`ep_buffer_control::W`](W) writer structure"]
315impl crate::Writable for EP_BUFFER_CONTROL_SPEC {
316const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
317const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
318}
319#[doc = "`reset()` method sets EP_BUFFER_CONTROL%s to value 0"]
320impl crate::Resettable for EP_BUFFER_CONTROL_SPEC {
321const RESET_VALUE: u32 = 0;
322}