imxrt_ral/blocks/imxrt1011/
iomuxc_snvs.rs
1#[doc = "IOMUXC_SNVS"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "SW_MUX_CTL_PAD_PMIC_ON_REQ SW MUX Control Register"]
5 pub SW_MUX_CTL_PAD_PMIC_ON_REQ: crate::RWRegister<u32>,
6 #[doc = "SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register"]
7 pub SW_PAD_CTL_PAD_TEST_MODE: crate::RWRegister<u32>,
8 #[doc = "SW_PAD_CTL_PAD_POR_B SW PAD Control Register"]
9 pub SW_PAD_CTL_PAD_POR_B: crate::RWRegister<u32>,
10 #[doc = "SW_PAD_CTL_PAD_ONOFF SW PAD Control Register"]
11 pub SW_PAD_CTL_PAD_ONOFF: crate::RWRegister<u32>,
12 #[doc = "SW_PAD_CTL_PAD_PMIC_ON_REQ SW PAD Control Register"]
13 pub SW_PAD_CTL_PAD_PMIC_ON_REQ: crate::RWRegister<u32>,
14}
15#[doc = "SW_MUX_CTL_PAD_PMIC_ON_REQ SW MUX Control Register"]
16pub mod SW_MUX_CTL_PAD_PMIC_ON_REQ {
17 #[doc = "MUX Mode Select Field."]
18 pub mod MUX_MODE {
19 pub const offset: u32 = 0;
20 pub const mask: u32 = 0x07 << offset;
21 pub mod R {}
22 pub mod W {}
23 pub mod RW {
24 #[doc = "Select mux mode: ALT0 mux port: SNVS_LP_PMIC_ON_REQ of instance: snvs_lp"]
25 pub const ALT0: u32 = 0;
26 #[doc = "Select mux mode: ALT5 mux port: GPIO5_IO00 of instance: gpio5"]
27 pub const ALT5: u32 = 0x05;
28 }
29 }
30 #[doc = "Software Input On Field."]
31 pub mod SION {
32 pub const offset: u32 = 4;
33 pub const mask: u32 = 0x01 << offset;
34 pub mod R {}
35 pub mod W {}
36 pub mod RW {
37 #[doc = "Input Path is determined by functionality"]
38 pub const DISABLED: u32 = 0;
39 #[doc = "Force input path of pad PMIC_ON_REQ"]
40 pub const ENABLED: u32 = 0x01;
41 }
42 }
43}
44#[doc = "SW_PAD_CTL_PAD_TEST_MODE SW PAD Control Register"]
45pub mod SW_PAD_CTL_PAD_TEST_MODE {
46 #[doc = "Slew Rate Field"]
47 pub mod SRE {
48 pub const offset: u32 = 0;
49 pub const mask: u32 = 0x01 << offset;
50 pub mod R {}
51 pub mod W {}
52 pub mod RW {
53 #[doc = "Slow Slew Rate"]
54 pub const SRE_0_SLOW_SLEW_RATE: u32 = 0;
55 #[doc = "Fast Slew Rate"]
56 pub const SRE_1_FAST_SLEW_RATE: u32 = 0x01;
57 }
58 }
59 #[doc = "Drive Strength Field"]
60 pub mod DSE {
61 pub const offset: u32 = 3;
62 pub const mask: u32 = 0x07 << offset;
63 pub mod R {}
64 pub mod W {}
65 pub mod RW {
66 #[doc = "output driver disabled;"]
67 pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
68 #[doc = "R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)"]
69 pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
70 #[doc = "R0/2"]
71 pub const DSE_2_R0_2: u32 = 0x02;
72 #[doc = "R0/3"]
73 pub const DSE_3_R0_3: u32 = 0x03;
74 #[doc = "R0/4"]
75 pub const DSE_4_R0_4: u32 = 0x04;
76 #[doc = "R0/5"]
77 pub const DSE_5_R0_5: u32 = 0x05;
78 #[doc = "R0/6"]
79 pub const DSE_6_R0_6: u32 = 0x06;
80 #[doc = "R0/7"]
81 pub const DSE_7_R0_7: u32 = 0x07;
82 }
83 }
84 #[doc = "Speed Field"]
85 pub mod SPEED {
86 pub const offset: u32 = 6;
87 pub const mask: u32 = 0x03 << offset;
88 pub mod R {}
89 pub mod W {}
90 pub mod RW {
91 #[doc = "medium(100MHz)"]
92 pub const SPEED: u32 = 0x02;
93 }
94 }
95 #[doc = "Open Drain Enable Field"]
96 pub mod ODE {
97 pub const offset: u32 = 11;
98 pub const mask: u32 = 0x01 << offset;
99 pub mod R {}
100 pub mod W {}
101 pub mod RW {
102 #[doc = "Open Drain Disabled"]
103 pub const ODE_0_OPEN_DRAIN_DISABLED: u32 = 0;
104 #[doc = "Open Drain Enabled"]
105 pub const ODE_1_OPEN_DRAIN_ENABLED: u32 = 0x01;
106 }
107 }
108 #[doc = "Pull / Keep Enable Field"]
109 pub mod PKE {
110 pub const offset: u32 = 12;
111 pub const mask: u32 = 0x01 << offset;
112 pub mod R {}
113 pub mod W {}
114 pub mod RW {
115 #[doc = "Pull/Keeper Disabled"]
116 pub const PKE_0_PULL_KEEPER_DISABLED: u32 = 0;
117 #[doc = "Pull/Keeper Enabled"]
118 pub const PKE_1_PULL_KEEPER_ENABLED: u32 = 0x01;
119 }
120 }
121 #[doc = "Pull / Keep Select Field"]
122 pub mod PUE {
123 pub const offset: u32 = 13;
124 pub const mask: u32 = 0x01 << offset;
125 pub mod R {}
126 pub mod W {}
127 pub mod RW {
128 #[doc = "Keeper"]
129 pub const PUE_0_KEEPER: u32 = 0;
130 #[doc = "Pull"]
131 pub const PUE_1_PULL: u32 = 0x01;
132 }
133 }
134 #[doc = "Pull Up / Down Config. Field"]
135 pub mod PUS {
136 pub const offset: u32 = 14;
137 pub const mask: u32 = 0x03 << offset;
138 pub mod R {}
139 pub mod W {}
140 pub mod RW {
141 #[doc = "100K Ohm Pull Down"]
142 pub const PUS_0_100K_OHM_PULL_DOWN: u32 = 0;
143 #[doc = "47K Ohm Pull Up"]
144 pub const PUS_1_47K_OHM_PULL_UP: u32 = 0x01;
145 #[doc = "100K Ohm Pull Up"]
146 pub const PUS_2_100K_OHM_PULL_UP: u32 = 0x02;
147 #[doc = "22K Ohm Pull Up"]
148 pub const PUS_3_22K_OHM_PULL_UP: u32 = 0x03;
149 }
150 }
151 #[doc = "Hyst. Enable Field"]
152 pub mod HYS {
153 pub const offset: u32 = 16;
154 pub const mask: u32 = 0x01 << offset;
155 pub mod R {}
156 pub mod W {}
157 pub mod RW {
158 #[doc = "Hysteresis Disabled"]
159 pub const HYS_0_HYSTERESIS_DISABLED: u32 = 0;
160 #[doc = "Hysteresis Enabled"]
161 pub const HYS_1_HYSTERESIS_ENABLED: u32 = 0x01;
162 }
163 }
164}
165#[doc = "SW_PAD_CTL_PAD_POR_B SW PAD Control Register"]
166pub mod SW_PAD_CTL_PAD_POR_B {
167 #[doc = "Slew Rate Field"]
168 pub mod SRE {
169 pub const offset: u32 = 0;
170 pub const mask: u32 = 0x01 << offset;
171 pub mod R {}
172 pub mod W {}
173 pub mod RW {
174 #[doc = "Slow Slew Rate"]
175 pub const SRE_0_SLOW_SLEW_RATE: u32 = 0;
176 #[doc = "Fast Slew Rate"]
177 pub const SRE_1_FAST_SLEW_RATE: u32 = 0x01;
178 }
179 }
180 #[doc = "Drive Strength Field"]
181 pub mod DSE {
182 pub const offset: u32 = 3;
183 pub const mask: u32 = 0x07 << offset;
184 pub mod R {}
185 pub mod W {}
186 pub mod RW {
187 #[doc = "output driver disabled;"]
188 pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
189 #[doc = "R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)"]
190 pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
191 #[doc = "R0/2"]
192 pub const DSE_2_R0_2: u32 = 0x02;
193 #[doc = "R0/3"]
194 pub const DSE_3_R0_3: u32 = 0x03;
195 #[doc = "R0/4"]
196 pub const DSE_4_R0_4: u32 = 0x04;
197 #[doc = "R0/5"]
198 pub const DSE_5_R0_5: u32 = 0x05;
199 #[doc = "R0/6"]
200 pub const DSE_6_R0_6: u32 = 0x06;
201 #[doc = "R0/7"]
202 pub const DSE_7_R0_7: u32 = 0x07;
203 }
204 }
205 #[doc = "Speed Field"]
206 pub mod SPEED {
207 pub const offset: u32 = 6;
208 pub const mask: u32 = 0x03 << offset;
209 pub mod R {}
210 pub mod W {}
211 pub mod RW {
212 #[doc = "medium(100MHz)"]
213 pub const SPEED: u32 = 0x02;
214 }
215 }
216 #[doc = "Open Drain Enable Field"]
217 pub mod ODE {
218 pub const offset: u32 = 11;
219 pub const mask: u32 = 0x01 << offset;
220 pub mod R {}
221 pub mod W {}
222 pub mod RW {
223 #[doc = "Open Drain Disabled"]
224 pub const ODE_0_OPEN_DRAIN_DISABLED: u32 = 0;
225 #[doc = "Open Drain Enabled"]
226 pub const ODE_1_OPEN_DRAIN_ENABLED: u32 = 0x01;
227 }
228 }
229 #[doc = "Pull / Keep Enable Field"]
230 pub mod PKE {
231 pub const offset: u32 = 12;
232 pub const mask: u32 = 0x01 << offset;
233 pub mod R {}
234 pub mod W {}
235 pub mod RW {
236 #[doc = "Pull/Keeper Disabled"]
237 pub const PKE_0_PULL_KEEPER_DISABLED: u32 = 0;
238 #[doc = "Pull/Keeper Enabled"]
239 pub const PKE_1_PULL_KEEPER_ENABLED: u32 = 0x01;
240 }
241 }
242 #[doc = "Pull / Keep Select Field"]
243 pub mod PUE {
244 pub const offset: u32 = 13;
245 pub const mask: u32 = 0x01 << offset;
246 pub mod R {}
247 pub mod W {}
248 pub mod RW {
249 #[doc = "Keeper"]
250 pub const PUE_0_KEEPER: u32 = 0;
251 #[doc = "Pull"]
252 pub const PUE_1_PULL: u32 = 0x01;
253 }
254 }
255 #[doc = "Pull Up / Down Config. Field"]
256 pub mod PUS {
257 pub const offset: u32 = 14;
258 pub const mask: u32 = 0x03 << offset;
259 pub mod R {}
260 pub mod W {}
261 pub mod RW {
262 #[doc = "100K Ohm Pull Down"]
263 pub const PUS_0_100K_OHM_PULL_DOWN: u32 = 0;
264 #[doc = "47K Ohm Pull Up"]
265 pub const PUS_1_47K_OHM_PULL_UP: u32 = 0x01;
266 #[doc = "100K Ohm Pull Up"]
267 pub const PUS_2_100K_OHM_PULL_UP: u32 = 0x02;
268 #[doc = "22K Ohm Pull Up"]
269 pub const PUS_3_22K_OHM_PULL_UP: u32 = 0x03;
270 }
271 }
272 #[doc = "Hyst. Enable Field"]
273 pub mod HYS {
274 pub const offset: u32 = 16;
275 pub const mask: u32 = 0x01 << offset;
276 pub mod R {}
277 pub mod W {}
278 pub mod RW {
279 #[doc = "Hysteresis Disabled"]
280 pub const HYS_0_HYSTERESIS_DISABLED: u32 = 0;
281 #[doc = "Hysteresis Enabled"]
282 pub const HYS_1_HYSTERESIS_ENABLED: u32 = 0x01;
283 }
284 }
285}
286#[doc = "SW_PAD_CTL_PAD_ONOFF SW PAD Control Register"]
287pub mod SW_PAD_CTL_PAD_ONOFF {
288 #[doc = "Slew Rate Field"]
289 pub mod SRE {
290 pub const offset: u32 = 0;
291 pub const mask: u32 = 0x01 << offset;
292 pub mod R {}
293 pub mod W {}
294 pub mod RW {
295 #[doc = "Slow Slew Rate"]
296 pub const SRE_0_SLOW_SLEW_RATE: u32 = 0;
297 #[doc = "Fast Slew Rate"]
298 pub const SRE_1_FAST_SLEW_RATE: u32 = 0x01;
299 }
300 }
301 #[doc = "Drive Strength Field"]
302 pub mod DSE {
303 pub const offset: u32 = 3;
304 pub const mask: u32 = 0x07 << offset;
305 pub mod R {}
306 pub mod W {}
307 pub mod RW {
308 #[doc = "output driver disabled;"]
309 pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
310 #[doc = "R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)"]
311 pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
312 #[doc = "R0/2"]
313 pub const DSE_2_R0_2: u32 = 0x02;
314 #[doc = "R0/3"]
315 pub const DSE_3_R0_3: u32 = 0x03;
316 #[doc = "R0/4"]
317 pub const DSE_4_R0_4: u32 = 0x04;
318 #[doc = "R0/5"]
319 pub const DSE_5_R0_5: u32 = 0x05;
320 #[doc = "R0/6"]
321 pub const DSE_6_R0_6: u32 = 0x06;
322 #[doc = "R0/7"]
323 pub const DSE_7_R0_7: u32 = 0x07;
324 }
325 }
326 #[doc = "Speed Field"]
327 pub mod SPEED {
328 pub const offset: u32 = 6;
329 pub const mask: u32 = 0x03 << offset;
330 pub mod R {}
331 pub mod W {}
332 pub mod RW {
333 #[doc = "medium(100MHz)"]
334 pub const SPEED: u32 = 0x02;
335 }
336 }
337 #[doc = "Open Drain Enable Field"]
338 pub mod ODE {
339 pub const offset: u32 = 11;
340 pub const mask: u32 = 0x01 << offset;
341 pub mod R {}
342 pub mod W {}
343 pub mod RW {
344 #[doc = "Open Drain Disabled"]
345 pub const ODE_0_OPEN_DRAIN_DISABLED: u32 = 0;
346 #[doc = "Open Drain Enabled"]
347 pub const ODE_1_OPEN_DRAIN_ENABLED: u32 = 0x01;
348 }
349 }
350 #[doc = "Pull / Keep Enable Field"]
351 pub mod PKE {
352 pub const offset: u32 = 12;
353 pub const mask: u32 = 0x01 << offset;
354 pub mod R {}
355 pub mod W {}
356 pub mod RW {
357 #[doc = "Pull/Keeper Disabled"]
358 pub const PKE_0_PULL_KEEPER_DISABLED: u32 = 0;
359 #[doc = "Pull/Keeper Enabled"]
360 pub const PKE_1_PULL_KEEPER_ENABLED: u32 = 0x01;
361 }
362 }
363 #[doc = "Pull / Keep Select Field"]
364 pub mod PUE {
365 pub const offset: u32 = 13;
366 pub const mask: u32 = 0x01 << offset;
367 pub mod R {}
368 pub mod W {}
369 pub mod RW {
370 #[doc = "Keeper"]
371 pub const PUE_0_KEEPER: u32 = 0;
372 #[doc = "Pull"]
373 pub const PUE_1_PULL: u32 = 0x01;
374 }
375 }
376 #[doc = "Pull Up / Down Config. Field"]
377 pub mod PUS {
378 pub const offset: u32 = 14;
379 pub const mask: u32 = 0x03 << offset;
380 pub mod R {}
381 pub mod W {}
382 pub mod RW {
383 #[doc = "100K Ohm Pull Down"]
384 pub const PUS_0_100K_OHM_PULL_DOWN: u32 = 0;
385 #[doc = "47K Ohm Pull Up"]
386 pub const PUS_1_47K_OHM_PULL_UP: u32 = 0x01;
387 #[doc = "100K Ohm Pull Up"]
388 pub const PUS_2_100K_OHM_PULL_UP: u32 = 0x02;
389 #[doc = "22K Ohm Pull Up"]
390 pub const PUS_3_22K_OHM_PULL_UP: u32 = 0x03;
391 }
392 }
393 #[doc = "Hyst. Enable Field"]
394 pub mod HYS {
395 pub const offset: u32 = 16;
396 pub const mask: u32 = 0x01 << offset;
397 pub mod R {}
398 pub mod W {}
399 pub mod RW {
400 #[doc = "Hysteresis Disabled"]
401 pub const HYS_0_HYSTERESIS_DISABLED: u32 = 0;
402 #[doc = "Hysteresis Enabled"]
403 pub const HYS_1_HYSTERESIS_ENABLED: u32 = 0x01;
404 }
405 }
406}
407#[doc = "SW_PAD_CTL_PAD_PMIC_ON_REQ SW PAD Control Register"]
408pub mod SW_PAD_CTL_PAD_PMIC_ON_REQ {
409 #[doc = "Slew Rate Field"]
410 pub mod SRE {
411 pub const offset: u32 = 0;
412 pub const mask: u32 = 0x01 << offset;
413 pub mod R {}
414 pub mod W {}
415 pub mod RW {
416 #[doc = "Slow Slew Rate"]
417 pub const SRE_0_SLOW_SLEW_RATE: u32 = 0;
418 #[doc = "Fast Slew Rate"]
419 pub const SRE_1_FAST_SLEW_RATE: u32 = 0x01;
420 }
421 }
422 #[doc = "Drive Strength Field"]
423 pub mod DSE {
424 pub const offset: u32 = 3;
425 pub const mask: u32 = 0x07 << offset;
426 pub mod R {}
427 pub mod W {}
428 pub mod RW {
429 #[doc = "output driver disabled;"]
430 pub const DSE_0_OUTPUT_DRIVER_DISABLED_: u32 = 0;
431 #[doc = "R0(150 Ohm @ 3.3V, 260 Ohm@1.8V)"]
432 pub const DSE_1_R0_150_OHM___3_3V__260_OHM_1_8V: u32 = 0x01;
433 #[doc = "R0/2"]
434 pub const DSE_2_R0_2: u32 = 0x02;
435 #[doc = "R0/3"]
436 pub const DSE_3_R0_3: u32 = 0x03;
437 #[doc = "R0/4"]
438 pub const DSE_4_R0_4: u32 = 0x04;
439 #[doc = "R0/5"]
440 pub const DSE_5_R0_5: u32 = 0x05;
441 #[doc = "R0/6"]
442 pub const DSE_6_R0_6: u32 = 0x06;
443 #[doc = "R0/7"]
444 pub const DSE_7_R0_7: u32 = 0x07;
445 }
446 }
447 #[doc = "Speed Field"]
448 pub mod SPEED {
449 pub const offset: u32 = 6;
450 pub const mask: u32 = 0x03 << offset;
451 pub mod R {}
452 pub mod W {}
453 pub mod RW {
454 #[doc = "medium(100MHz)"]
455 pub const SPEED: u32 = 0x02;
456 }
457 }
458 #[doc = "Open Drain Enable Field"]
459 pub mod ODE {
460 pub const offset: u32 = 11;
461 pub const mask: u32 = 0x01 << offset;
462 pub mod R {}
463 pub mod W {}
464 pub mod RW {
465 #[doc = "Open Drain Disabled"]
466 pub const ODE_0_OPEN_DRAIN_DISABLED: u32 = 0;
467 #[doc = "Open Drain Enabled"]
468 pub const ODE_1_OPEN_DRAIN_ENABLED: u32 = 0x01;
469 }
470 }
471 #[doc = "Pull / Keep Enable Field"]
472 pub mod PKE {
473 pub const offset: u32 = 12;
474 pub const mask: u32 = 0x01 << offset;
475 pub mod R {}
476 pub mod W {}
477 pub mod RW {
478 #[doc = "Pull/Keeper Disabled"]
479 pub const PKE_0_PULL_KEEPER_DISABLED: u32 = 0;
480 #[doc = "Pull/Keeper Enabled"]
481 pub const PKE_1_PULL_KEEPER_ENABLED: u32 = 0x01;
482 }
483 }
484 #[doc = "Pull / Keep Select Field"]
485 pub mod PUE {
486 pub const offset: u32 = 13;
487 pub const mask: u32 = 0x01 << offset;
488 pub mod R {}
489 pub mod W {}
490 pub mod RW {
491 #[doc = "Keeper"]
492 pub const PUE_0_KEEPER: u32 = 0;
493 #[doc = "Pull"]
494 pub const PUE_1_PULL: u32 = 0x01;
495 }
496 }
497 #[doc = "Pull Up / Down Config. Field"]
498 pub mod PUS {
499 pub const offset: u32 = 14;
500 pub const mask: u32 = 0x03 << offset;
501 pub mod R {}
502 pub mod W {}
503 pub mod RW {
504 #[doc = "100K Ohm Pull Down"]
505 pub const PUS_0_100K_OHM_PULL_DOWN: u32 = 0;
506 #[doc = "47K Ohm Pull Up"]
507 pub const PUS_1_47K_OHM_PULL_UP: u32 = 0x01;
508 #[doc = "100K Ohm Pull Up"]
509 pub const PUS_2_100K_OHM_PULL_UP: u32 = 0x02;
510 #[doc = "22K Ohm Pull Up"]
511 pub const PUS_3_22K_OHM_PULL_UP: u32 = 0x03;
512 }
513 }
514 #[doc = "Hyst. Enable Field"]
515 pub mod HYS {
516 pub const offset: u32 = 16;
517 pub const mask: u32 = 0x01 << offset;
518 pub mod R {}
519 pub mod W {}
520 pub mod RW {
521 #[doc = "Hysteresis Disabled"]
522 pub const HYS_0_HYSTERESIS_DISABLED: u32 = 0;
523 #[doc = "Hysteresis Enabled"]
524 pub const HYS_1_HYSTERESIS_ENABLED: u32 = 0x01;
525 }
526 }
527}