rp2040_pac/xip_ctrl/
stream_ctr.rs

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1#[doc = "Register `STREAM_CTR` reader"]
2pub type R = crate::R<STREAM_CTR_SPEC>;
3#[doc = "Register `STREAM_CTR` writer"]
4pub type W = crate::W<STREAM_CTR_SPEC>;
5#[doc = "Field `STREAM_CTR` reader - Write a nonzero value to start a streaming read. This will then  
6 progress in the background, using flash idle cycles to transfer  
7 a linear data block from flash to the streaming FIFO.  
8 Decrements automatically (1 at a time) as the stream  
9 progresses, and halts on reaching 0.  
10 Write 0 to halt an in-progress stream, and discard any in-flight  
11 read, so that a new stream can immediately be started (after  
12 draining the FIFO and reinitialising STREAM_ADDR)"]
13pub type STREAM_CTR_R = crate::FieldReader<u32>;
14#[doc = "Field `STREAM_CTR` writer - Write a nonzero value to start a streaming read. This will then  
15 progress in the background, using flash idle cycles to transfer  
16 a linear data block from flash to the streaming FIFO.  
17 Decrements automatically (1 at a time) as the stream  
18 progresses, and halts on reaching 0.  
19 Write 0 to halt an in-progress stream, and discard any in-flight  
20 read, so that a new stream can immediately be started (after  
21 draining the FIFO and reinitialising STREAM_ADDR)"]
22pub type STREAM_CTR_W<'a, REG> = crate::FieldWriter<'a, REG, 22, u32>;
23impl R {
24    #[doc = "Bits 0:21 - Write a nonzero value to start a streaming read. This will then  
25 progress in the background, using flash idle cycles to transfer  
26 a linear data block from flash to the streaming FIFO.  
27 Decrements automatically (1 at a time) as the stream  
28 progresses, and halts on reaching 0.  
29 Write 0 to halt an in-progress stream, and discard any in-flight  
30 read, so that a new stream can immediately be started (after  
31 draining the FIFO and reinitialising STREAM_ADDR)"]
32    #[inline(always)]
33    pub fn stream_ctr(&self) -> STREAM_CTR_R {
34        STREAM_CTR_R::new(self.bits & 0x003f_ffff)
35    }
36}
37impl W {
38    #[doc = "Bits 0:21 - Write a nonzero value to start a streaming read. This will then  
39 progress in the background, using flash idle cycles to transfer  
40 a linear data block from flash to the streaming FIFO.  
41 Decrements automatically (1 at a time) as the stream  
42 progresses, and halts on reaching 0.  
43 Write 0 to halt an in-progress stream, and discard any in-flight  
44 read, so that a new stream can immediately be started (after  
45 draining the FIFO and reinitialising STREAM_ADDR)"]
46    #[inline(always)]
47    #[must_use]
48    pub fn stream_ctr(&mut self) -> STREAM_CTR_W<STREAM_CTR_SPEC> {
49        STREAM_CTR_W::new(self, 0)
50    }
51    #[doc = r" Writes raw bits to the register."]
52    #[doc = r""]
53    #[doc = r" # Safety"]
54    #[doc = r""]
55    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
56    #[inline(always)]
57    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
58        self.bits = bits;
59        self
60    }
61}
62#[doc = "FIFO stream control  
63
64You can [`read`](crate::generic::Reg::read) this register and get [`stream_ctr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`stream_ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
65pub struct STREAM_CTR_SPEC;
66impl crate::RegisterSpec for STREAM_CTR_SPEC {
67    type Ux = u32;
68}
69#[doc = "`read()` method returns [`stream_ctr::R`](R) reader structure"]
70impl crate::Readable for STREAM_CTR_SPEC {}
71#[doc = "`write(|w| ..)` method takes [`stream_ctr::W`](W) writer structure"]
72impl crate::Writable for STREAM_CTR_SPEC {
73    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
74    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
75}
76#[doc = "`reset()` method sets STREAM_CTR to value 0"]
77impl crate::Resettable for STREAM_CTR_SPEC {
78    const RESET_VALUE: u32 = 0;
79}
rp2040_pac/xip_ctrl/stream_ctr.rs

rp2040_pac/xip_ctrl/
stream_ctr.rs
