rp2040_pac/usbctrl_regs/
host_addr_endp.rs

1#[doc = "Register `HOST_ADDR_ENDP%s` reader"]
2pub type R = crate::R<HOST_ADDR_ENDP_SPEC>;
3#[doc = "Register `HOST_ADDR_ENDP%s` writer"]
4pub type W = crate::W<HOST_ADDR_ENDP_SPEC>;
5#[doc = "Field `ADDRESS` reader - Device address"]
6pub type ADDRESS_R = crate::FieldReader;
7#[doc = "Field `ADDRESS` writer - Device address"]
8pub type ADDRESS_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
9#[doc = "Field `ENDPOINT` reader - Endpoint number of the interrupt endpoint"]
10pub type ENDPOINT_R = crate::FieldReader;
11#[doc = "Field `ENDPOINT` writer - Endpoint number of the interrupt endpoint"]
12pub type ENDPOINT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `INTEP_DIR` reader - Direction of the interrupt endpoint. In=0, Out=1"]
14pub type INTEP_DIR_R = crate::BitReader;
15#[doc = "Field `INTEP_DIR` writer - Direction of the interrupt endpoint. In=0, Out=1"]
16pub type INTEP_DIR_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `INTEP_PREAMBLE` reader - Interrupt EP requires preamble (is a low speed device on a full speed hub)"]
18pub type INTEP_PREAMBLE_R = crate::BitReader;
19#[doc = "Field `INTEP_PREAMBLE` writer - Interrupt EP requires preamble (is a low speed device on a full speed hub)"]
20pub type INTEP_PREAMBLE_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bits 0:6 - Device address"]
23    #[inline(always)]
24    pub fn address(&self) -> ADDRESS_R {
25        ADDRESS_R::new((self.bits & 0x7f) as u8)
26    }
27    #[doc = "Bits 16:19 - Endpoint number of the interrupt endpoint"]
28    #[inline(always)]
29    pub fn endpoint(&self) -> ENDPOINT_R {
30        ENDPOINT_R::new(((self.bits >> 16) & 0x0f) as u8)
31    }
32    #[doc = "Bit 25 - Direction of the interrupt endpoint. In=0, Out=1"]
33    #[inline(always)]
34    pub fn intep_dir(&self) -> INTEP_DIR_R {
35        INTEP_DIR_R::new(((self.bits >> 25) & 1) != 0)
36    }
37    #[doc = "Bit 26 - Interrupt EP requires preamble (is a low speed device on a full speed hub)"]
38    #[inline(always)]
39    pub fn intep_preamble(&self) -> INTEP_PREAMBLE_R {
40        INTEP_PREAMBLE_R::new(((self.bits >> 26) & 1) != 0)
41    }
42}
43impl W {
44    #[doc = "Bits 0:6 - Device address"]
45    #[inline(always)]
46    #[must_use]
47    pub fn address(&mut self) -> ADDRESS_W<HOST_ADDR_ENDP_SPEC> {
48        ADDRESS_W::new(self, 0)
49    }
50    #[doc = "Bits 16:19 - Endpoint number of the interrupt endpoint"]
51    #[inline(always)]
52    #[must_use]
53    pub fn endpoint(&mut self) -> ENDPOINT_W<HOST_ADDR_ENDP_SPEC> {
54        ENDPOINT_W::new(self, 16)
55    }
56    #[doc = "Bit 25 - Direction of the interrupt endpoint. In=0, Out=1"]
57    #[inline(always)]
58    #[must_use]
59    pub fn intep_dir(&mut self) -> INTEP_DIR_W<HOST_ADDR_ENDP_SPEC> {
60        INTEP_DIR_W::new(self, 25)
61    }
62    #[doc = "Bit 26 - Interrupt EP requires preamble (is a low speed device on a full speed hub)"]
63    #[inline(always)]
64    #[must_use]
65    pub fn intep_preamble(&mut self) -> INTEP_PREAMBLE_W<HOST_ADDR_ENDP_SPEC> {
66        INTEP_PREAMBLE_W::new(self, 26)
67    }
68    #[doc = r" Writes raw bits to the register."]
69    #[doc = r""]
70    #[doc = r" # Safety"]
71    #[doc = r""]
72    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
73    #[inline(always)]
74    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
75        self.bits = bits;
76        self
77    }
78}
79#[doc = "Interrupt endpoints. Only valid in HOST mode.  
80
81You can [`read`](crate::generic::Reg::read) this register and get [`host_addr_endp::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`host_addr_endp::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
82pub struct HOST_ADDR_ENDP_SPEC;
83impl crate::RegisterSpec for HOST_ADDR_ENDP_SPEC {
84    type Ux = u32;
85}
86#[doc = "`read()` method returns [`host_addr_endp::R`](R) reader structure"]
87impl crate::Readable for HOST_ADDR_ENDP_SPEC {}
88#[doc = "`write(|w| ..)` method takes [`host_addr_endp::W`](W) writer structure"]
89impl crate::Writable for HOST_ADDR_ENDP_SPEC {
90    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
91    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
92}
93#[doc = "`reset()` method sets HOST_ADDR_ENDP%s to value 0"]
94impl crate::Resettable for HOST_ADDR_ENDP_SPEC {
95    const RESET_VALUE: u32 = 0;
96}