imxrt_ral/blocks/imxrt1011/
aipstz.rs

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1#[doc = "AIPSTZ Control Registers"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "Master Priviledge Registers"]
5    pub MPR: crate::RWRegister<u32>,
6    _reserved0: [u8; 0x3c],
7    #[doc = "Off-Platform Peripheral Access Control Registers"]
8    pub OPACR: crate::RWRegister<u32>,
9    #[doc = "Off-Platform Peripheral Access Control Registers"]
10    pub OPACR1: crate::RWRegister<u32>,
11    #[doc = "Off-Platform Peripheral Access Control Registers"]
12    pub OPACR2: crate::RWRegister<u32>,
13    #[doc = "Off-Platform Peripheral Access Control Registers"]
14    pub OPACR3: crate::RWRegister<u32>,
15    #[doc = "Off-Platform Peripheral Access Control Registers"]
16    pub OPACR4: crate::RWRegister<u32>,
17}
18#[doc = "Master Priviledge Registers"]
19pub mod MPR {
20    #[doc = "Master 5 Priviledge, Buffer, Read, Write Control."]
21    pub mod MPROT5 {
22        pub const offset: u32 = 8;
23        pub const mask: u32 = 0x0f << offset;
24        pub mod R {}
25        pub mod W {}
26        pub mod RW {
27            #[doc = "Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot\\[1\\] access attribute."]
28            pub const MPL0: u32 = 0;
29            #[doc = "Accesses from this master are not forced to user-mode. The hprot\\[1\\] access attribute is used directly to determine ips_supervisor_access."]
30            pub const MPL1: u32 = 0x01;
31        }
32    }
33    #[doc = "Master 3 Priviledge, Buffer, Read, Write Control."]
34    pub mod MPROT3 {
35        pub const offset: u32 = 16;
36        pub const mask: u32 = 0x0f << offset;
37        pub mod R {}
38        pub mod W {}
39        pub mod RW {
40            #[doc = "Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot\\[1\\] access attribute."]
41            pub const MPL0: u32 = 0;
42            #[doc = "Accesses from this master are not forced to user-mode. The hprot\\[1\\] access attribute is used directly to determine ips_supervisor_access."]
43            pub const MPL1: u32 = 0x01;
44        }
45    }
46    #[doc = "Master 2 Priviledge, Buffer, Read, Write Control"]
47    pub mod MPROT2 {
48        pub const offset: u32 = 20;
49        pub const mask: u32 = 0x0f << offset;
50        pub mod R {}
51        pub mod W {}
52        pub mod RW {
53            #[doc = "Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot\\[1\\] access attribute."]
54            pub const MPL0: u32 = 0;
55            #[doc = "Accesses from this master are not forced to user-mode. The hprot\\[1\\] access attribute is used directly to determine ips_supervisor_access."]
56            pub const MPL1: u32 = 0x01;
57        }
58    }
59    #[doc = "Master 1 Priviledge, Buffer, Read, Write Control"]
60    pub mod MPROT1 {
61        pub const offset: u32 = 24;
62        pub const mask: u32 = 0x0f << offset;
63        pub mod R {}
64        pub mod W {}
65        pub mod RW {
66            #[doc = "Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot\\[1\\] access attribute."]
67            pub const MPL0: u32 = 0;
68            #[doc = "Accesses from this master are not forced to user-mode. The hprot\\[1\\] access attribute is used directly to determine ips_supervisor_access."]
69            pub const MPL1: u32 = 0x01;
70        }
71    }
72    #[doc = "Master 0 Priviledge, Buffer, Read, Write Control"]
73    pub mod MPROT0 {
74        pub const offset: u32 = 28;
75        pub const mask: u32 = 0x0f << offset;
76        pub mod R {}
77        pub mod W {}
78        pub mod RW {
79            #[doc = "Accesses from this master are forced to user-mode (ips_supervisor_access is forced to zero) regardless of the hprot\\[1\\] access attribute."]
80            pub const MPL0: u32 = 0;
81            #[doc = "Accesses from this master are not forced to user-mode. The hprot\\[1\\] access attribute is used directly to determine ips_supervisor_access."]
82            pub const MPL1: u32 = 0x01;
83        }
84    }
85}
86#[doc = "Off-Platform Peripheral Access Control Registers"]
87pub mod OPACR {
88    #[doc = "Off-platform Peripheral Access Control 7"]
89    pub mod OPAC7 {
90        pub const offset: u32 = 0;
91        pub const mask: u32 = 0x0f << offset;
92        pub mod R {}
93        pub mod W {}
94        pub mod RW {
95            #[doc = "Accesses from an untrusted master are allowed."]
96            pub const TP0: u32 = 0;
97            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
98            pub const TP1: u32 = 0x01;
99        }
100    }
101    #[doc = "Off-platform Peripheral Access Control 6"]
102    pub mod OPAC6 {
103        pub const offset: u32 = 4;
104        pub const mask: u32 = 0x0f << offset;
105        pub mod R {}
106        pub mod W {}
107        pub mod RW {
108            #[doc = "Accesses from an untrusted master are allowed."]
109            pub const TP0: u32 = 0;
110            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
111            pub const TP1: u32 = 0x01;
112        }
113    }
114    #[doc = "Off-platform Peripheral Access Control 5"]
115    pub mod OPAC5 {
116        pub const offset: u32 = 8;
117        pub const mask: u32 = 0x0f << offset;
118        pub mod R {}
119        pub mod W {}
120        pub mod RW {
121            #[doc = "Accesses from an untrusted master are allowed."]
122            pub const TP0: u32 = 0;
123            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
124            pub const TP1: u32 = 0x01;
125        }
126    }
127    #[doc = "Off-platform Peripheral Access Control 4"]
128    pub mod OPAC4 {
129        pub const offset: u32 = 12;
130        pub const mask: u32 = 0x0f << offset;
131        pub mod R {}
132        pub mod W {}
133        pub mod RW {
134            #[doc = "Accesses from an untrusted master are allowed."]
135            pub const TP0: u32 = 0;
136            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
137            pub const TP1: u32 = 0x01;
138        }
139    }
140    #[doc = "Off-platform Peripheral Access Control 3"]
141    pub mod OPAC3 {
142        pub const offset: u32 = 16;
143        pub const mask: u32 = 0x0f << offset;
144        pub mod R {}
145        pub mod W {}
146        pub mod RW {
147            #[doc = "Accesses from an untrusted master are allowed."]
148            pub const TP0: u32 = 0;
149            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
150            pub const TP1: u32 = 0x01;
151        }
152    }
153    #[doc = "Off-platform Peripheral Access Control 2"]
154    pub mod OPAC2 {
155        pub const offset: u32 = 20;
156        pub const mask: u32 = 0x0f << offset;
157        pub mod R {}
158        pub mod W {}
159        pub mod RW {
160            #[doc = "Accesses from an untrusted master are allowed."]
161            pub const TP0: u32 = 0;
162            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
163            pub const TP1: u32 = 0x01;
164        }
165    }
166    #[doc = "Off-platform Peripheral Access Control 1"]
167    pub mod OPAC1 {
168        pub const offset: u32 = 24;
169        pub const mask: u32 = 0x0f << offset;
170        pub mod R {}
171        pub mod W {}
172        pub mod RW {
173            #[doc = "Accesses from an untrusted master are allowed."]
174            pub const TP0: u32 = 0;
175            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
176            pub const TP1: u32 = 0x01;
177        }
178    }
179    #[doc = "Off-platform Peripheral Access Control 0"]
180    pub mod OPAC0 {
181        pub const offset: u32 = 28;
182        pub const mask: u32 = 0x0f << offset;
183        pub mod R {}
184        pub mod W {}
185        pub mod RW {
186            #[doc = "Accesses from an untrusted master are allowed."]
187            pub const TP0: u32 = 0;
188            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
189            pub const TP1: u32 = 0x01;
190        }
191    }
192}
193#[doc = "Off-Platform Peripheral Access Control Registers"]
194pub mod OPACR1 {
195    #[doc = "Off-platform Peripheral Access Control 15"]
196    pub mod OPAC15 {
197        pub const offset: u32 = 0;
198        pub const mask: u32 = 0x0f << offset;
199        pub mod R {}
200        pub mod W {}
201        pub mod RW {
202            #[doc = "Accesses from an untrusted master are allowed."]
203            pub const TP0: u32 = 0;
204            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
205            pub const TP1: u32 = 0x01;
206        }
207    }
208    #[doc = "Off-platform Peripheral Access Control 14"]
209    pub mod OPAC14 {
210        pub const offset: u32 = 4;
211        pub const mask: u32 = 0x0f << offset;
212        pub mod R {}
213        pub mod W {}
214        pub mod RW {
215            #[doc = "Accesses from an untrusted master are allowed."]
216            pub const TP0: u32 = 0;
217            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
218            pub const TP1: u32 = 0x01;
219        }
220    }
221    #[doc = "Off-platform Peripheral Access Control 13"]
222    pub mod OPAC13 {
223        pub const offset: u32 = 8;
224        pub const mask: u32 = 0x0f << offset;
225        pub mod R {}
226        pub mod W {}
227        pub mod RW {
228            #[doc = "Accesses from an untrusted master are allowed."]
229            pub const TP0: u32 = 0;
230            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
231            pub const TP1: u32 = 0x01;
232        }
233    }
234    #[doc = "Off-platform Peripheral Access Control 12"]
235    pub mod OPAC12 {
236        pub const offset: u32 = 12;
237        pub const mask: u32 = 0x0f << offset;
238        pub mod R {}
239        pub mod W {}
240        pub mod RW {
241            #[doc = "Accesses from an untrusted master are allowed."]
242            pub const TP0: u32 = 0;
243            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
244            pub const TP1: u32 = 0x01;
245        }
246    }
247    #[doc = "Off-platform Peripheral Access Control 11"]
248    pub mod OPAC11 {
249        pub const offset: u32 = 16;
250        pub const mask: u32 = 0x0f << offset;
251        pub mod R {}
252        pub mod W {}
253        pub mod RW {
254            #[doc = "Accesses from an untrusted master are allowed."]
255            pub const TP0: u32 = 0;
256            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
257            pub const TP1: u32 = 0x01;
258        }
259    }
260    #[doc = "Off-platform Peripheral Access Control 10"]
261    pub mod OPAC10 {
262        pub const offset: u32 = 20;
263        pub const mask: u32 = 0x0f << offset;
264        pub mod R {}
265        pub mod W {}
266        pub mod RW {
267            #[doc = "Accesses from an untrusted master are allowed."]
268            pub const TP0: u32 = 0;
269            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
270            pub const TP1: u32 = 0x01;
271        }
272    }
273    #[doc = "Off-platform Peripheral Access Control 9"]
274    pub mod OPAC9 {
275        pub const offset: u32 = 24;
276        pub const mask: u32 = 0x0f << offset;
277        pub mod R {}
278        pub mod W {}
279        pub mod RW {
280            #[doc = "Accesses from an untrusted master are allowed."]
281            pub const TP0: u32 = 0;
282            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
283            pub const TP1: u32 = 0x01;
284        }
285    }
286    #[doc = "Off-platform Peripheral Access Control 8"]
287    pub mod OPAC8 {
288        pub const offset: u32 = 28;
289        pub const mask: u32 = 0x0f << offset;
290        pub mod R {}
291        pub mod W {}
292        pub mod RW {
293            #[doc = "Accesses from an untrusted master are allowed."]
294            pub const TP0: u32 = 0;
295            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
296            pub const TP1: u32 = 0x01;
297        }
298    }
299}
300#[doc = "Off-Platform Peripheral Access Control Registers"]
301pub mod OPACR2 {
302    #[doc = "Off-platform Peripheral Access Control 23"]
303    pub mod OPAC23 {
304        pub const offset: u32 = 0;
305        pub const mask: u32 = 0x0f << offset;
306        pub mod R {}
307        pub mod W {}
308        pub mod RW {
309            #[doc = "Accesses from an untrusted master are allowed."]
310            pub const TP0: u32 = 0;
311            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
312            pub const TP1: u32 = 0x01;
313        }
314    }
315    #[doc = "Off-platform Peripheral Access Control 22"]
316    pub mod OPAC22 {
317        pub const offset: u32 = 4;
318        pub const mask: u32 = 0x0f << offset;
319        pub mod R {}
320        pub mod W {}
321        pub mod RW {
322            #[doc = "Accesses from an untrusted master are allowed."]
323            pub const TP0: u32 = 0;
324            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
325            pub const TP1: u32 = 0x01;
326        }
327    }
328    #[doc = "Off-platform Peripheral Access Control 21"]
329    pub mod OPAC21 {
330        pub const offset: u32 = 8;
331        pub const mask: u32 = 0x0f << offset;
332        pub mod R {}
333        pub mod W {}
334        pub mod RW {
335            #[doc = "Accesses from an untrusted master are allowed."]
336            pub const TP0: u32 = 0;
337            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
338            pub const TP1: u32 = 0x01;
339        }
340    }
341    #[doc = "Off-platform Peripheral Access Control 20"]
342    pub mod OPAC20 {
343        pub const offset: u32 = 12;
344        pub const mask: u32 = 0x0f << offset;
345        pub mod R {}
346        pub mod W {}
347        pub mod RW {
348            #[doc = "Accesses from an untrusted master are allowed."]
349            pub const TP0: u32 = 0;
350            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
351            pub const TP1: u32 = 0x01;
352        }
353    }
354    #[doc = "Off-platform Peripheral Access Control 19"]
355    pub mod OPAC19 {
356        pub const offset: u32 = 16;
357        pub const mask: u32 = 0x0f << offset;
358        pub mod R {}
359        pub mod W {}
360        pub mod RW {
361            #[doc = "Accesses from an untrusted master are allowed."]
362            pub const TP0: u32 = 0;
363            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
364            pub const TP1: u32 = 0x01;
365        }
366    }
367    #[doc = "Off-platform Peripheral Access Control 18"]
368    pub mod OPAC18 {
369        pub const offset: u32 = 20;
370        pub const mask: u32 = 0x0f << offset;
371        pub mod R {}
372        pub mod W {}
373        pub mod RW {
374            #[doc = "Accesses from an untrusted master are allowed."]
375            pub const TP0: u32 = 0;
376            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
377            pub const TP1: u32 = 0x01;
378        }
379    }
380    #[doc = "Off-platform Peripheral Access Control 17"]
381    pub mod OPAC17 {
382        pub const offset: u32 = 24;
383        pub const mask: u32 = 0x0f << offset;
384        pub mod R {}
385        pub mod W {}
386        pub mod RW {
387            #[doc = "Accesses from an untrusted master are allowed."]
388            pub const TP0: u32 = 0;
389            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
390            pub const TP1: u32 = 0x01;
391        }
392    }
393    #[doc = "Off-platform Peripheral Access Control 16"]
394    pub mod OPAC16 {
395        pub const offset: u32 = 28;
396        pub const mask: u32 = 0x0f << offset;
397        pub mod R {}
398        pub mod W {}
399        pub mod RW {
400            #[doc = "Accesses from an untrusted master are allowed."]
401            pub const TP0: u32 = 0;
402            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
403            pub const TP1: u32 = 0x01;
404        }
405    }
406}
407#[doc = "Off-Platform Peripheral Access Control Registers"]
408pub mod OPACR3 {
409    #[doc = "Off-platform Peripheral Access Control 31"]
410    pub mod OPAC31 {
411        pub const offset: u32 = 0;
412        pub const mask: u32 = 0x0f << offset;
413        pub mod R {}
414        pub mod W {}
415        pub mod RW {
416            #[doc = "Accesses from an untrusted master are allowed."]
417            pub const TP0: u32 = 0;
418            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
419            pub const TP1: u32 = 0x01;
420        }
421    }
422    #[doc = "Off-platform Peripheral Access Control 30"]
423    pub mod OPAC30 {
424        pub const offset: u32 = 4;
425        pub const mask: u32 = 0x0f << offset;
426        pub mod R {}
427        pub mod W {}
428        pub mod RW {
429            #[doc = "Accesses from an untrusted master are allowed."]
430            pub const TP0: u32 = 0;
431            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
432            pub const TP1: u32 = 0x01;
433        }
434    }
435    #[doc = "Off-platform Peripheral Access Control 29"]
436    pub mod OPAC29 {
437        pub const offset: u32 = 8;
438        pub const mask: u32 = 0x0f << offset;
439        pub mod R {}
440        pub mod W {}
441        pub mod RW {
442            #[doc = "Accesses from an untrusted master are allowed."]
443            pub const TP0: u32 = 0;
444            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
445            pub const TP1: u32 = 0x01;
446        }
447    }
448    #[doc = "Off-platform Peripheral Access Control 28"]
449    pub mod OPAC28 {
450        pub const offset: u32 = 12;
451        pub const mask: u32 = 0x0f << offset;
452        pub mod R {}
453        pub mod W {}
454        pub mod RW {
455            #[doc = "Accesses from an untrusted master are allowed."]
456            pub const TP0: u32 = 0;
457            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
458            pub const TP1: u32 = 0x01;
459        }
460    }
461    #[doc = "Off-platform Peripheral Access Control 27"]
462    pub mod OPAC27 {
463        pub const offset: u32 = 16;
464        pub const mask: u32 = 0x0f << offset;
465        pub mod R {}
466        pub mod W {}
467        pub mod RW {
468            #[doc = "Accesses from an untrusted master are allowed."]
469            pub const TP0: u32 = 0;
470            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
471            pub const TP1: u32 = 0x01;
472        }
473    }
474    #[doc = "Off-platform Peripheral Access Control 26"]
475    pub mod OPAC26 {
476        pub const offset: u32 = 20;
477        pub const mask: u32 = 0x0f << offset;
478        pub mod R {}
479        pub mod W {}
480        pub mod RW {
481            #[doc = "Accesses from an untrusted master are allowed."]
482            pub const TP0: u32 = 0;
483            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
484            pub const TP1: u32 = 0x01;
485        }
486    }
487    #[doc = "Off-platform Peripheral Access Control 25"]
488    pub mod OPAC25 {
489        pub const offset: u32 = 24;
490        pub const mask: u32 = 0x0f << offset;
491        pub mod R {}
492        pub mod W {}
493        pub mod RW {
494            #[doc = "Accesses from an untrusted master are allowed."]
495            pub const TP0: u32 = 0;
496            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
497            pub const TP1: u32 = 0x01;
498        }
499    }
500    #[doc = "Off-platform Peripheral Access Control 24"]
501    pub mod OPAC24 {
502        pub const offset: u32 = 28;
503        pub const mask: u32 = 0x0f << offset;
504        pub mod R {}
505        pub mod W {}
506        pub mod RW {
507            #[doc = "Accesses from an untrusted master are allowed."]
508            pub const TP0: u32 = 0;
509            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
510            pub const TP1: u32 = 0x01;
511        }
512    }
513}
514#[doc = "Off-Platform Peripheral Access Control Registers"]
515pub mod OPACR4 {
516    #[doc = "Off-platform Peripheral Access Control 33"]
517    pub mod OPAC33 {
518        pub const offset: u32 = 24;
519        pub const mask: u32 = 0x0f << offset;
520        pub mod R {}
521        pub mod W {}
522        pub mod RW {
523            #[doc = "Accesses from an untrusted master are allowed."]
524            pub const TP0: u32 = 0;
525            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
526            pub const TP1: u32 = 0x01;
527        }
528    }
529    #[doc = "Off-platform Peripheral Access Control 32"]
530    pub mod OPAC32 {
531        pub const offset: u32 = 28;
532        pub const mask: u32 = 0x0f << offset;
533        pub mod R {}
534        pub mod W {}
535        pub mod RW {
536            #[doc = "Accesses from an untrusted master are allowed."]
537            pub const TP0: u32 = 0;
538            #[doc = "Accesses from an untrusted master are not allowed. If an access is attempted by an untrusted master, the access is terminated with an error response and no peripheral access is initiated on the IPS bus."]
539            pub const TP1: u32 = 0x01;
540        }
541    }
542}
imxrt_ral/blocks/imxrt1011/aipstz.rs

imxrt_ral/blocks/imxrt1011/
aipstz.rs
