imxrt_ral/blocks/imxrt1011/
dmamux.rs

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1#[doc = "DMAMUX"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "Channel 0 Configuration Register"]
5    pub CHCFG: [crate::RWRegister<u32>; 16usize],
6}
7#[doc = "Channel 0 Configuration Register"]
8pub mod CHCFG {
9    #[doc = "DMA Channel Source (Slot Number)"]
10    pub mod SOURCE {
11        pub const offset: u32 = 0;
12        pub const mask: u32 = 0x7f << offset;
13        pub mod R {}
14        pub mod W {}
15        pub mod RW {}
16    }
17    #[doc = "DMA Channel Always Enable"]
18    pub mod A_ON {
19        pub const offset: u32 = 29;
20        pub const mask: u32 = 0x01 << offset;
21        pub mod R {}
22        pub mod W {}
23        pub mod RW {
24            #[doc = "DMA Channel Always ON function is disabled"]
25            pub const A_ON_0: u32 = 0;
26            #[doc = "DMA Channel Always ON function is enabled"]
27            pub const A_ON_1: u32 = 0x01;
28        }
29    }
30    #[doc = "DMA Channel Trigger Enable"]
31    pub mod TRIG {
32        pub const offset: u32 = 30;
33        pub const mask: u32 = 0x01 << offset;
34        pub mod R {}
35        pub mod W {}
36        pub mod RW {
37            #[doc = "Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode)"]
38            pub const TRIG_0: u32 = 0;
39            #[doc = "Triggering is enabled. If triggering is enabled and ENBL is set, the DMA_CH_MUX is in Periodic Trigger mode."]
40            pub const TRIG_1: u32 = 0x01;
41        }
42    }
43    #[doc = "DMA Mux Channel Enable"]
44    pub mod ENBL {
45        pub const offset: u32 = 31;
46        pub const mask: u32 = 0x01 << offset;
47        pub mod R {}
48        pub mod W {}
49        pub mod RW {
50            #[doc = "DMA Mux channel is disabled"]
51            pub const ENBL_0: u32 = 0;
52            #[doc = "DMA Mux channel is enabled"]
53            pub const ENBL_1: u32 = 0x01;
54        }
55    }
56}
imxrt_ral/blocks/imxrt1011/dmamux.rs

imxrt_ral/blocks/imxrt1011/
dmamux.rs
