nrf52840_pac/radio/
modecnf0.rs
1#[doc = "Register `MODECNF0` reader"]
2pub struct R(crate::R<MODECNF0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<MODECNF0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<MODECNF0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<MODECNF0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `MODECNF0` writer"]
17pub struct W(crate::W<MODECNF0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<MODECNF0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<MODECNF0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<MODECNF0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RU` reader - Radio ramp-up time"]
38pub type RU_R = crate::BitReader<RU_A>;
39#[doc = "Radio ramp-up time\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41pub enum RU_A {
42 #[doc = "0: Default ramp-up time (tRXEN), compatible with firmware written for nRF51"]
43 DEFAULT = 0,
44 #[doc = "1: Fast ramp-up (tRXEN,FAST), see electrical specification for more information"]
45 FAST = 1,
46}
47impl From<RU_A> for bool {
48 #[inline(always)]
49 fn from(variant: RU_A) -> Self {
50 variant as u8 != 0
51 }
52}
53impl RU_R {
54 #[doc = "Get enumerated values variant"]
55 #[inline(always)]
56 pub fn variant(&self) -> RU_A {
57 match self.bits {
58 false => RU_A::DEFAULT,
59 true => RU_A::FAST,
60 }
61 }
62 #[doc = "Checks if the value of the field is `DEFAULT`"]
63 #[inline(always)]
64 pub fn is_default(&self) -> bool {
65 *self == RU_A::DEFAULT
66 }
67 #[doc = "Checks if the value of the field is `FAST`"]
68 #[inline(always)]
69 pub fn is_fast(&self) -> bool {
70 *self == RU_A::FAST
71 }
72}
73#[doc = "Field `RU` writer - Radio ramp-up time"]
74pub type RU_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODECNF0_SPEC, RU_A, O>;
75impl<'a, const O: u8> RU_W<'a, O> {
76 #[doc = "Default ramp-up time (tRXEN), compatible with firmware written for nRF51"]
77 #[inline(always)]
78 pub fn default(self) -> &'a mut W {
79 self.variant(RU_A::DEFAULT)
80 }
81 #[doc = "Fast ramp-up (tRXEN,FAST), see electrical specification for more information"]
82 #[inline(always)]
83 pub fn fast(self) -> &'a mut W {
84 self.variant(RU_A::FAST)
85 }
86}
87#[doc = "Field `DTX` reader - Default TX value"]
88pub type DTX_R = crate::FieldReader<u8, DTX_A>;
89#[doc = "Default TX value\n\nValue on reset: 2"]
90#[derive(Clone, Copy, Debug, PartialEq)]
91#[repr(u8)]
92pub enum DTX_A {
93 #[doc = "0: Transmit '1'"]
94 B1 = 0,
95 #[doc = "1: Transmit '0'"]
96 B0 = 1,
97 #[doc = "2: Transmit center frequency"]
98 CENTER = 2,
99}
100impl From<DTX_A> for u8 {
101 #[inline(always)]
102 fn from(variant: DTX_A) -> Self {
103 variant as _
104 }
105}
106impl DTX_R {
107 #[doc = "Get enumerated values variant"]
108 #[inline(always)]
109 pub fn variant(&self) -> Option<DTX_A> {
110 match self.bits {
111 0 => Some(DTX_A::B1),
112 1 => Some(DTX_A::B0),
113 2 => Some(DTX_A::CENTER),
114 _ => None,
115 }
116 }
117 #[doc = "Checks if the value of the field is `B1`"]
118 #[inline(always)]
119 pub fn is_b1(&self) -> bool {
120 *self == DTX_A::B1
121 }
122 #[doc = "Checks if the value of the field is `B0`"]
123 #[inline(always)]
124 pub fn is_b0(&self) -> bool {
125 *self == DTX_A::B0
126 }
127 #[doc = "Checks if the value of the field is `CENTER`"]
128 #[inline(always)]
129 pub fn is_center(&self) -> bool {
130 *self == DTX_A::CENTER
131 }
132}
133#[doc = "Field `DTX` writer - Default TX value"]
134pub type DTX_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MODECNF0_SPEC, u8, DTX_A, 2, O>;
135impl<'a, const O: u8> DTX_W<'a, O> {
136 #[doc = "Transmit '1'"]
137 #[inline(always)]
138 pub fn b1(self) -> &'a mut W {
139 self.variant(DTX_A::B1)
140 }
141 #[doc = "Transmit '0'"]
142 #[inline(always)]
143 pub fn b0(self) -> &'a mut W {
144 self.variant(DTX_A::B0)
145 }
146 #[doc = "Transmit center frequency"]
147 #[inline(always)]
148 pub fn center(self) -> &'a mut W {
149 self.variant(DTX_A::CENTER)
150 }
151}
152impl R {
153 #[doc = "Bit 0 - Radio ramp-up time"]
154 #[inline(always)]
155 pub fn ru(&self) -> RU_R {
156 RU_R::new((self.bits & 1) != 0)
157 }
158 #[doc = "Bits 8:9 - Default TX value"]
159 #[inline(always)]
160 pub fn dtx(&self) -> DTX_R {
161 DTX_R::new(((self.bits >> 8) & 3) as u8)
162 }
163}
164impl W {
165 #[doc = "Bit 0 - Radio ramp-up time"]
166 #[inline(always)]
167 pub fn ru(&mut self) -> RU_W<0> {
168 RU_W::new(self)
169 }
170 #[doc = "Bits 8:9 - Default TX value"]
171 #[inline(always)]
172 pub fn dtx(&mut self) -> DTX_W<8> {
173 DTX_W::new(self)
174 }
175 #[doc = "Writes raw bits to the register."]
176 #[inline(always)]
177 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
178 self.0.bits(bits);
179 self
180 }
181}
182#[doc = "Radio mode configuration register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [modecnf0](index.html) module"]
183pub struct MODECNF0_SPEC;
184impl crate::RegisterSpec for MODECNF0_SPEC {
185 type Ux = u32;
186}
187#[doc = "`read()` method returns [modecnf0::R](R) reader structure"]
188impl crate::Readable for MODECNF0_SPEC {
189 type Reader = R;
190}
191#[doc = "`write(|w| ..)` method takes [modecnf0::W](W) writer structure"]
192impl crate::Writable for MODECNF0_SPEC {
193 type Writer = W;
194}
195#[doc = "`reset()` method sets MODECNF0 to value 0x0200"]
196impl crate::Resettable for MODECNF0_SPEC {
197 #[inline(always)]
198 fn reset_value() -> Self::Ux {
199 0x0200
200 }
201}