rp2040_pac/resets/
reset.rs

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1#[doc = "Register `RESET` reader"]
2pub type R = crate::R<RESET_SPEC>;
3#[doc = "Register `RESET` writer"]
4pub type W = crate::W<RESET_SPEC>;
5#[doc = "Field `adc` reader - "]
6pub type ADC_R = crate::BitReader;
7#[doc = "Field `adc` writer - "]
8pub type ADC_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `busctrl` reader - "]
10pub type BUSCTRL_R = crate::BitReader;
11#[doc = "Field `busctrl` writer - "]
12pub type BUSCTRL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `dma` reader - "]
14pub type DMA_R = crate::BitReader;
15#[doc = "Field `dma` writer - "]
16pub type DMA_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `i2c0` reader - "]
18pub type I2C0_R = crate::BitReader;
19#[doc = "Field `i2c0` writer - "]
20pub type I2C0_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `i2c1` reader - "]
22pub type I2C1_R = crate::BitReader;
23#[doc = "Field `i2c1` writer - "]
24pub type I2C1_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `io_bank0` reader - "]
26pub type IO_BANK0_R = crate::BitReader;
27#[doc = "Field `io_bank0` writer - "]
28pub type IO_BANK0_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `io_qspi` reader - "]
30pub type IO_QSPI_R = crate::BitReader;
31#[doc = "Field `io_qspi` writer - "]
32pub type IO_QSPI_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `jtag` reader - "]
34pub type JTAG_R = crate::BitReader;
35#[doc = "Field `jtag` writer - "]
36pub type JTAG_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `pads_bank0` reader - "]
38pub type PADS_BANK0_R = crate::BitReader;
39#[doc = "Field `pads_bank0` writer - "]
40pub type PADS_BANK0_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `pads_qspi` reader - "]
42pub type PADS_QSPI_R = crate::BitReader;
43#[doc = "Field `pads_qspi` writer - "]
44pub type PADS_QSPI_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `pio0` reader - "]
46pub type PIO0_R = crate::BitReader;
47#[doc = "Field `pio0` writer - "]
48pub type PIO0_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `pio1` reader - "]
50pub type PIO1_R = crate::BitReader;
51#[doc = "Field `pio1` writer - "]
52pub type PIO1_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `pll_sys` reader - "]
54pub type PLL_SYS_R = crate::BitReader;
55#[doc = "Field `pll_sys` writer - "]
56pub type PLL_SYS_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `pll_usb` reader - "]
58pub type PLL_USB_R = crate::BitReader;
59#[doc = "Field `pll_usb` writer - "]
60pub type PLL_USB_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `pwm` reader - "]
62pub type PWM_R = crate::BitReader;
63#[doc = "Field `pwm` writer - "]
64pub type PWM_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `rtc` reader - "]
66pub type RTC_R = crate::BitReader;
67#[doc = "Field `rtc` writer - "]
68pub type RTC_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `spi0` reader - "]
70pub type SPI0_R = crate::BitReader;
71#[doc = "Field `spi0` writer - "]
72pub type SPI0_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `spi1` reader - "]
74pub type SPI1_R = crate::BitReader;
75#[doc = "Field `spi1` writer - "]
76pub type SPI1_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `syscfg` reader - "]
78pub type SYSCFG_R = crate::BitReader;
79#[doc = "Field `syscfg` writer - "]
80pub type SYSCFG_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `sysinfo` reader - "]
82pub type SYSINFO_R = crate::BitReader;
83#[doc = "Field `sysinfo` writer - "]
84pub type SYSINFO_W<'a, REG> = crate::BitWriter<'a, REG>;
85#[doc = "Field `tbman` reader - "]
86pub type TBMAN_R = crate::BitReader;
87#[doc = "Field `tbman` writer - "]
88pub type TBMAN_W<'a, REG> = crate::BitWriter<'a, REG>;
89#[doc = "Field `timer` reader - "]
90pub type TIMER_R = crate::BitReader;
91#[doc = "Field `timer` writer - "]
92pub type TIMER_W<'a, REG> = crate::BitWriter<'a, REG>;
93#[doc = "Field `uart0` reader - "]
94pub type UART0_R = crate::BitReader;
95#[doc = "Field `uart0` writer - "]
96pub type UART0_W<'a, REG> = crate::BitWriter<'a, REG>;
97#[doc = "Field `uart1` reader - "]
98pub type UART1_R = crate::BitReader;
99#[doc = "Field `uart1` writer - "]
100pub type UART1_W<'a, REG> = crate::BitWriter<'a, REG>;
101#[doc = "Field `usbctrl` reader - "]
102pub type USBCTRL_R = crate::BitReader;
103#[doc = "Field `usbctrl` writer - "]
104pub type USBCTRL_W<'a, REG> = crate::BitWriter<'a, REG>;
105impl R {
106    #[doc = "Bit 0"]
107    #[inline(always)]
108    pub fn adc(&self) -> ADC_R {
109        ADC_R::new((self.bits & 1) != 0)
110    }
111    #[doc = "Bit 1"]
112    #[inline(always)]
113    pub fn busctrl(&self) -> BUSCTRL_R {
114        BUSCTRL_R::new(((self.bits >> 1) & 1) != 0)
115    }
116    #[doc = "Bit 2"]
117    #[inline(always)]
118    pub fn dma(&self) -> DMA_R {
119        DMA_R::new(((self.bits >> 2) & 1) != 0)
120    }
121    #[doc = "Bit 3"]
122    #[inline(always)]
123    pub fn i2c0(&self) -> I2C0_R {
124        I2C0_R::new(((self.bits >> 3) & 1) != 0)
125    }
126    #[doc = "Bit 4"]
127    #[inline(always)]
128    pub fn i2c1(&self) -> I2C1_R {
129        I2C1_R::new(((self.bits >> 4) & 1) != 0)
130    }
131    #[doc = "Bit 5"]
132    #[inline(always)]
133    pub fn io_bank0(&self) -> IO_BANK0_R {
134        IO_BANK0_R::new(((self.bits >> 5) & 1) != 0)
135    }
136    #[doc = "Bit 6"]
137    #[inline(always)]
138    pub fn io_qspi(&self) -> IO_QSPI_R {
139        IO_QSPI_R::new(((self.bits >> 6) & 1) != 0)
140    }
141    #[doc = "Bit 7"]
142    #[inline(always)]
143    pub fn jtag(&self) -> JTAG_R {
144        JTAG_R::new(((self.bits >> 7) & 1) != 0)
145    }
146    #[doc = "Bit 8"]
147    #[inline(always)]
148    pub fn pads_bank0(&self) -> PADS_BANK0_R {
149        PADS_BANK0_R::new(((self.bits >> 8) & 1) != 0)
150    }
151    #[doc = "Bit 9"]
152    #[inline(always)]
153    pub fn pads_qspi(&self) -> PADS_QSPI_R {
154        PADS_QSPI_R::new(((self.bits >> 9) & 1) != 0)
155    }
156    #[doc = "Bit 10"]
157    #[inline(always)]
158    pub fn pio0(&self) -> PIO0_R {
159        PIO0_R::new(((self.bits >> 10) & 1) != 0)
160    }
161    #[doc = "Bit 11"]
162    #[inline(always)]
163    pub fn pio1(&self) -> PIO1_R {
164        PIO1_R::new(((self.bits >> 11) & 1) != 0)
165    }
166    #[doc = "Bit 12"]
167    #[inline(always)]
168    pub fn pll_sys(&self) -> PLL_SYS_R {
169        PLL_SYS_R::new(((self.bits >> 12) & 1) != 0)
170    }
171    #[doc = "Bit 13"]
172    #[inline(always)]
173    pub fn pll_usb(&self) -> PLL_USB_R {
174        PLL_USB_R::new(((self.bits >> 13) & 1) != 0)
175    }
176    #[doc = "Bit 14"]
177    #[inline(always)]
178    pub fn pwm(&self) -> PWM_R {
179        PWM_R::new(((self.bits >> 14) & 1) != 0)
180    }
181    #[doc = "Bit 15"]
182    #[inline(always)]
183    pub fn rtc(&self) -> RTC_R {
184        RTC_R::new(((self.bits >> 15) & 1) != 0)
185    }
186    #[doc = "Bit 16"]
187    #[inline(always)]
188    pub fn spi0(&self) -> SPI0_R {
189        SPI0_R::new(((self.bits >> 16) & 1) != 0)
190    }
191    #[doc = "Bit 17"]
192    #[inline(always)]
193    pub fn spi1(&self) -> SPI1_R {
194        SPI1_R::new(((self.bits >> 17) & 1) != 0)
195    }
196    #[doc = "Bit 18"]
197    #[inline(always)]
198    pub fn syscfg(&self) -> SYSCFG_R {
199        SYSCFG_R::new(((self.bits >> 18) & 1) != 0)
200    }
201    #[doc = "Bit 19"]
202    #[inline(always)]
203    pub fn sysinfo(&self) -> SYSINFO_R {
204        SYSINFO_R::new(((self.bits >> 19) & 1) != 0)
205    }
206    #[doc = "Bit 20"]
207    #[inline(always)]
208    pub fn tbman(&self) -> TBMAN_R {
209        TBMAN_R::new(((self.bits >> 20) & 1) != 0)
210    }
211    #[doc = "Bit 21"]
212    #[inline(always)]
213    pub fn timer(&self) -> TIMER_R {
214        TIMER_R::new(((self.bits >> 21) & 1) != 0)
215    }
216    #[doc = "Bit 22"]
217    #[inline(always)]
218    pub fn uart0(&self) -> UART0_R {
219        UART0_R::new(((self.bits >> 22) & 1) != 0)
220    }
221    #[doc = "Bit 23"]
222    #[inline(always)]
223    pub fn uart1(&self) -> UART1_R {
224        UART1_R::new(((self.bits >> 23) & 1) != 0)
225    }
226    #[doc = "Bit 24"]
227    #[inline(always)]
228    pub fn usbctrl(&self) -> USBCTRL_R {
229        USBCTRL_R::new(((self.bits >> 24) & 1) != 0)
230    }
231}
232impl W {
233    #[doc = "Bit 0"]
234    #[inline(always)]
235    #[must_use]
236    pub fn adc(&mut self) -> ADC_W<RESET_SPEC> {
237        ADC_W::new(self, 0)
238    }
239    #[doc = "Bit 1"]
240    #[inline(always)]
241    #[must_use]
242    pub fn busctrl(&mut self) -> BUSCTRL_W<RESET_SPEC> {
243        BUSCTRL_W::new(self, 1)
244    }
245    #[doc = "Bit 2"]
246    #[inline(always)]
247    #[must_use]
248    pub fn dma(&mut self) -> DMA_W<RESET_SPEC> {
249        DMA_W::new(self, 2)
250    }
251    #[doc = "Bit 3"]
252    #[inline(always)]
253    #[must_use]
254    pub fn i2c0(&mut self) -> I2C0_W<RESET_SPEC> {
255        I2C0_W::new(self, 3)
256    }
257    #[doc = "Bit 4"]
258    #[inline(always)]
259    #[must_use]
260    pub fn i2c1(&mut self) -> I2C1_W<RESET_SPEC> {
261        I2C1_W::new(self, 4)
262    }
263    #[doc = "Bit 5"]
264    #[inline(always)]
265    #[must_use]
266    pub fn io_bank0(&mut self) -> IO_BANK0_W<RESET_SPEC> {
267        IO_BANK0_W::new(self, 5)
268    }
269    #[doc = "Bit 6"]
270    #[inline(always)]
271    #[must_use]
272    pub fn io_qspi(&mut self) -> IO_QSPI_W<RESET_SPEC> {
273        IO_QSPI_W::new(self, 6)
274    }
275    #[doc = "Bit 7"]
276    #[inline(always)]
277    #[must_use]
278    pub fn jtag(&mut self) -> JTAG_W<RESET_SPEC> {
279        JTAG_W::new(self, 7)
280    }
281    #[doc = "Bit 8"]
282    #[inline(always)]
283    #[must_use]
284    pub fn pads_bank0(&mut self) -> PADS_BANK0_W<RESET_SPEC> {
285        PADS_BANK0_W::new(self, 8)
286    }
287    #[doc = "Bit 9"]
288    #[inline(always)]
289    #[must_use]
290    pub fn pads_qspi(&mut self) -> PADS_QSPI_W<RESET_SPEC> {
291        PADS_QSPI_W::new(self, 9)
292    }
293    #[doc = "Bit 10"]
294    #[inline(always)]
295    #[must_use]
296    pub fn pio0(&mut self) -> PIO0_W<RESET_SPEC> {
297        PIO0_W::new(self, 10)
298    }
299    #[doc = "Bit 11"]
300    #[inline(always)]
301    #[must_use]
302    pub fn pio1(&mut self) -> PIO1_W<RESET_SPEC> {
303        PIO1_W::new(self, 11)
304    }
305    #[doc = "Bit 12"]
306    #[inline(always)]
307    #[must_use]
308    pub fn pll_sys(&mut self) -> PLL_SYS_W<RESET_SPEC> {
309        PLL_SYS_W::new(self, 12)
310    }
311    #[doc = "Bit 13"]
312    #[inline(always)]
313    #[must_use]
314    pub fn pll_usb(&mut self) -> PLL_USB_W<RESET_SPEC> {
315        PLL_USB_W::new(self, 13)
316    }
317    #[doc = "Bit 14"]
318    #[inline(always)]
319    #[must_use]
320    pub fn pwm(&mut self) -> PWM_W<RESET_SPEC> {
321        PWM_W::new(self, 14)
322    }
323    #[doc = "Bit 15"]
324    #[inline(always)]
325    #[must_use]
326    pub fn rtc(&mut self) -> RTC_W<RESET_SPEC> {
327        RTC_W::new(self, 15)
328    }
329    #[doc = "Bit 16"]
330    #[inline(always)]
331    #[must_use]
332    pub fn spi0(&mut self) -> SPI0_W<RESET_SPEC> {
333        SPI0_W::new(self, 16)
334    }
335    #[doc = "Bit 17"]
336    #[inline(always)]
337    #[must_use]
338    pub fn spi1(&mut self) -> SPI1_W<RESET_SPEC> {
339        SPI1_W::new(self, 17)
340    }
341    #[doc = "Bit 18"]
342    #[inline(always)]
343    #[must_use]
344    pub fn syscfg(&mut self) -> SYSCFG_W<RESET_SPEC> {
345        SYSCFG_W::new(self, 18)
346    }
347    #[doc = "Bit 19"]
348    #[inline(always)]
349    #[must_use]
350    pub fn sysinfo(&mut self) -> SYSINFO_W<RESET_SPEC> {
351        SYSINFO_W::new(self, 19)
352    }
353    #[doc = "Bit 20"]
354    #[inline(always)]
355    #[must_use]
356    pub fn tbman(&mut self) -> TBMAN_W<RESET_SPEC> {
357        TBMAN_W::new(self, 20)
358    }
359    #[doc = "Bit 21"]
360    #[inline(always)]
361    #[must_use]
362    pub fn timer(&mut self) -> TIMER_W<RESET_SPEC> {
363        TIMER_W::new(self, 21)
364    }
365    #[doc = "Bit 22"]
366    #[inline(always)]
367    #[must_use]
368    pub fn uart0(&mut self) -> UART0_W<RESET_SPEC> {
369        UART0_W::new(self, 22)
370    }
371    #[doc = "Bit 23"]
372    #[inline(always)]
373    #[must_use]
374    pub fn uart1(&mut self) -> UART1_W<RESET_SPEC> {
375        UART1_W::new(self, 23)
376    }
377    #[doc = "Bit 24"]
378    #[inline(always)]
379    #[must_use]
380    pub fn usbctrl(&mut self) -> USBCTRL_W<RESET_SPEC> {
381        USBCTRL_W::new(self, 24)
382    }
383    #[doc = r" Writes raw bits to the register."]
384    #[doc = r""]
385    #[doc = r" # Safety"]
386    #[doc = r""]
387    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
388    #[inline(always)]
389    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
390        self.bits = bits;
391        self
392    }
393}
394#[doc = "Reset control. If a bit is set it means the peripheral is in reset. 0 means the peripheral's reset is deasserted.  
395
396You can [`read`](crate::generic::Reg::read) this register and get [`reset::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
397pub struct RESET_SPEC;
398impl crate::RegisterSpec for RESET_SPEC {
399    type Ux = u32;
400}
401#[doc = "`read()` method returns [`reset::R`](R) reader structure"]
402impl crate::Readable for RESET_SPEC {}
403#[doc = "`write(|w| ..)` method takes [`reset::W`](W) writer structure"]
404impl crate::Writable for RESET_SPEC {
405    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
406    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
407}
408#[doc = "`reset()` method sets RESET to value 0x01ff_ffff"]
409impl crate::Resettable for RESET_SPEC {
410    const RESET_VALUE: u32 = 0x01ff_ffff;
411}
rp2040_pac/resets/reset.rs

rp2040_pac/resets/
reset.rs
