rp2040_pac/usbctrl_regs/
inte.rs

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1#[doc = "Register `INTE` reader"]
2pub type R = crate::R<INTE_SPEC>;
3#[doc = "Register `INTE` writer"]
4pub type W = crate::W<INTE_SPEC>;
5#[doc = "Field `HOST_CONN_DIS` reader - Host: raised when a device is connected or disconnected (i.e. when SIE_STATUS.SPEED changes). Cleared by writing to SIE_STATUS.SPEED"]
6pub type HOST_CONN_DIS_R = crate::BitReader;
7#[doc = "Field `HOST_CONN_DIS` writer - Host: raised when a device is connected or disconnected (i.e. when SIE_STATUS.SPEED changes). Cleared by writing to SIE_STATUS.SPEED"]
8pub type HOST_CONN_DIS_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `HOST_RESUME` reader - Host: raised when a device wakes up the host. Cleared by writing to SIE_STATUS.RESUME"]
10pub type HOST_RESUME_R = crate::BitReader;
11#[doc = "Field `HOST_RESUME` writer - Host: raised when a device wakes up the host. Cleared by writing to SIE_STATUS.RESUME"]
12pub type HOST_RESUME_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `HOST_SOF` reader - Host: raised every time the host sends a SOF (Start of Frame). Cleared by reading SOF_RD"]
14pub type HOST_SOF_R = crate::BitReader;
15#[doc = "Field `HOST_SOF` writer - Host: raised every time the host sends a SOF (Start of Frame). Cleared by reading SOF_RD"]
16pub type HOST_SOF_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `TRANS_COMPLETE` reader - Raised every time SIE_STATUS.TRANS_COMPLETE is set. Clear by writing to this bit."]
18pub type TRANS_COMPLETE_R = crate::BitReader;
19#[doc = "Field `TRANS_COMPLETE` writer - Raised every time SIE_STATUS.TRANS_COMPLETE is set. Clear by writing to this bit."]
20pub type TRANS_COMPLETE_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BUFF_STATUS` reader - Raised when any bit in BUFF_STATUS is set. Clear by clearing all bits in BUFF_STATUS."]
22pub type BUFF_STATUS_R = crate::BitReader;
23#[doc = "Field `BUFF_STATUS` writer - Raised when any bit in BUFF_STATUS is set. Clear by clearing all bits in BUFF_STATUS."]
24pub type BUFF_STATUS_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ERROR_DATA_SEQ` reader - Source: SIE_STATUS.DATA_SEQ_ERROR"]
26pub type ERROR_DATA_SEQ_R = crate::BitReader;
27#[doc = "Field `ERROR_DATA_SEQ` writer - Source: SIE_STATUS.DATA_SEQ_ERROR"]
28pub type ERROR_DATA_SEQ_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `ERROR_RX_TIMEOUT` reader - Source: SIE_STATUS.RX_TIMEOUT"]
30pub type ERROR_RX_TIMEOUT_R = crate::BitReader;
31#[doc = "Field `ERROR_RX_TIMEOUT` writer - Source: SIE_STATUS.RX_TIMEOUT"]
32pub type ERROR_RX_TIMEOUT_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `ERROR_RX_OVERFLOW` reader - Source: SIE_STATUS.RX_OVERFLOW"]
34pub type ERROR_RX_OVERFLOW_R = crate::BitReader;
35#[doc = "Field `ERROR_RX_OVERFLOW` writer - Source: SIE_STATUS.RX_OVERFLOW"]
36pub type ERROR_RX_OVERFLOW_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `ERROR_BIT_STUFF` reader - Source: SIE_STATUS.BIT_STUFF_ERROR"]
38pub type ERROR_BIT_STUFF_R = crate::BitReader;
39#[doc = "Field `ERROR_BIT_STUFF` writer - Source: SIE_STATUS.BIT_STUFF_ERROR"]
40pub type ERROR_BIT_STUFF_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `ERROR_CRC` reader - Source: SIE_STATUS.CRC_ERROR"]
42pub type ERROR_CRC_R = crate::BitReader;
43#[doc = "Field `ERROR_CRC` writer - Source: SIE_STATUS.CRC_ERROR"]
44pub type ERROR_CRC_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `STALL` reader - Source: SIE_STATUS.STALL_REC"]
46pub type STALL_R = crate::BitReader;
47#[doc = "Field `STALL` writer - Source: SIE_STATUS.STALL_REC"]
48pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `VBUS_DETECT` reader - Source: SIE_STATUS.VBUS_DETECTED"]
50pub type VBUS_DETECT_R = crate::BitReader;
51#[doc = "Field `VBUS_DETECT` writer - Source: SIE_STATUS.VBUS_DETECTED"]
52pub type VBUS_DETECT_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `BUS_RESET` reader - Source: SIE_STATUS.BUS_RESET"]
54pub type BUS_RESET_R = crate::BitReader;
55#[doc = "Field `BUS_RESET` writer - Source: SIE_STATUS.BUS_RESET"]
56pub type BUS_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `DEV_CONN_DIS` reader - Set when the device connection state changes. Cleared by writing to SIE_STATUS.CONNECTED"]
58pub type DEV_CONN_DIS_R = crate::BitReader;
59#[doc = "Field `DEV_CONN_DIS` writer - Set when the device connection state changes. Cleared by writing to SIE_STATUS.CONNECTED"]
60pub type DEV_CONN_DIS_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `DEV_SUSPEND` reader - Set when the device suspend state changes. Cleared by writing to SIE_STATUS.SUSPENDED"]
62pub type DEV_SUSPEND_R = crate::BitReader;
63#[doc = "Field `DEV_SUSPEND` writer - Set when the device suspend state changes. Cleared by writing to SIE_STATUS.SUSPENDED"]
64pub type DEV_SUSPEND_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `DEV_RESUME_FROM_HOST` reader - Set when the device receives a resume from the host. Cleared by writing to SIE_STATUS.RESUME"]
66pub type DEV_RESUME_FROM_HOST_R = crate::BitReader;
67#[doc = "Field `DEV_RESUME_FROM_HOST` writer - Set when the device receives a resume from the host. Cleared by writing to SIE_STATUS.RESUME"]
68pub type DEV_RESUME_FROM_HOST_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `SETUP_REQ` reader - Device. Source: SIE_STATUS.SETUP_REC"]
70pub type SETUP_REQ_R = crate::BitReader;
71#[doc = "Field `SETUP_REQ` writer - Device. Source: SIE_STATUS.SETUP_REC"]
72pub type SETUP_REQ_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `DEV_SOF` reader - Set every time the device receives a SOF (Start of Frame) packet. Cleared by reading SOF_RD"]
74pub type DEV_SOF_R = crate::BitReader;
75#[doc = "Field `DEV_SOF` writer - Set every time the device receives a SOF (Start of Frame) packet. Cleared by reading SOF_RD"]
76pub type DEV_SOF_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `ABORT_DONE` reader - Raised when any bit in ABORT_DONE is set. Clear by clearing all bits in ABORT_DONE."]
78pub type ABORT_DONE_R = crate::BitReader;
79#[doc = "Field `ABORT_DONE` writer - Raised when any bit in ABORT_DONE is set. Clear by clearing all bits in ABORT_DONE."]
80pub type ABORT_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
81#[doc = "Field `EP_STALL_NAK` reader - Raised when any bit in EP_STATUS_STALL_NAK is set. Clear by clearing all bits in EP_STATUS_STALL_NAK."]
82pub type EP_STALL_NAK_R = crate::BitReader;
83#[doc = "Field `EP_STALL_NAK` writer - Raised when any bit in EP_STATUS_STALL_NAK is set. Clear by clearing all bits in EP_STATUS_STALL_NAK."]
84pub type EP_STALL_NAK_W<'a, REG> = crate::BitWriter<'a, REG>;
85impl R {
86    #[doc = "Bit 0 - Host: raised when a device is connected or disconnected (i.e. when SIE_STATUS.SPEED changes). Cleared by writing to SIE_STATUS.SPEED"]
87    #[inline(always)]
88    pub fn host_conn_dis(&self) -> HOST_CONN_DIS_R {
89        HOST_CONN_DIS_R::new((self.bits & 1) != 0)
90    }
91    #[doc = "Bit 1 - Host: raised when a device wakes up the host. Cleared by writing to SIE_STATUS.RESUME"]
92    #[inline(always)]
93    pub fn host_resume(&self) -> HOST_RESUME_R {
94        HOST_RESUME_R::new(((self.bits >> 1) & 1) != 0)
95    }
96    #[doc = "Bit 2 - Host: raised every time the host sends a SOF (Start of Frame). Cleared by reading SOF_RD"]
97    #[inline(always)]
98    pub fn host_sof(&self) -> HOST_SOF_R {
99        HOST_SOF_R::new(((self.bits >> 2) & 1) != 0)
100    }
101    #[doc = "Bit 3 - Raised every time SIE_STATUS.TRANS_COMPLETE is set. Clear by writing to this bit."]
102    #[inline(always)]
103    pub fn trans_complete(&self) -> TRANS_COMPLETE_R {
104        TRANS_COMPLETE_R::new(((self.bits >> 3) & 1) != 0)
105    }
106    #[doc = "Bit 4 - Raised when any bit in BUFF_STATUS is set. Clear by clearing all bits in BUFF_STATUS."]
107    #[inline(always)]
108    pub fn buff_status(&self) -> BUFF_STATUS_R {
109        BUFF_STATUS_R::new(((self.bits >> 4) & 1) != 0)
110    }
111    #[doc = "Bit 5 - Source: SIE_STATUS.DATA_SEQ_ERROR"]
112    #[inline(always)]
113    pub fn error_data_seq(&self) -> ERROR_DATA_SEQ_R {
114        ERROR_DATA_SEQ_R::new(((self.bits >> 5) & 1) != 0)
115    }
116    #[doc = "Bit 6 - Source: SIE_STATUS.RX_TIMEOUT"]
117    #[inline(always)]
118    pub fn error_rx_timeout(&self) -> ERROR_RX_TIMEOUT_R {
119        ERROR_RX_TIMEOUT_R::new(((self.bits >> 6) & 1) != 0)
120    }
121    #[doc = "Bit 7 - Source: SIE_STATUS.RX_OVERFLOW"]
122    #[inline(always)]
123    pub fn error_rx_overflow(&self) -> ERROR_RX_OVERFLOW_R {
124        ERROR_RX_OVERFLOW_R::new(((self.bits >> 7) & 1) != 0)
125    }
126    #[doc = "Bit 8 - Source: SIE_STATUS.BIT_STUFF_ERROR"]
127    #[inline(always)]
128    pub fn error_bit_stuff(&self) -> ERROR_BIT_STUFF_R {
129        ERROR_BIT_STUFF_R::new(((self.bits >> 8) & 1) != 0)
130    }
131    #[doc = "Bit 9 - Source: SIE_STATUS.CRC_ERROR"]
132    #[inline(always)]
133    pub fn error_crc(&self) -> ERROR_CRC_R {
134        ERROR_CRC_R::new(((self.bits >> 9) & 1) != 0)
135    }
136    #[doc = "Bit 10 - Source: SIE_STATUS.STALL_REC"]
137    #[inline(always)]
138    pub fn stall(&self) -> STALL_R {
139        STALL_R::new(((self.bits >> 10) & 1) != 0)
140    }
141    #[doc = "Bit 11 - Source: SIE_STATUS.VBUS_DETECTED"]
142    #[inline(always)]
143    pub fn vbus_detect(&self) -> VBUS_DETECT_R {
144        VBUS_DETECT_R::new(((self.bits >> 11) & 1) != 0)
145    }
146    #[doc = "Bit 12 - Source: SIE_STATUS.BUS_RESET"]
147    #[inline(always)]
148    pub fn bus_reset(&self) -> BUS_RESET_R {
149        BUS_RESET_R::new(((self.bits >> 12) & 1) != 0)
150    }
151    #[doc = "Bit 13 - Set when the device connection state changes. Cleared by writing to SIE_STATUS.CONNECTED"]
152    #[inline(always)]
153    pub fn dev_conn_dis(&self) -> DEV_CONN_DIS_R {
154        DEV_CONN_DIS_R::new(((self.bits >> 13) & 1) != 0)
155    }
156    #[doc = "Bit 14 - Set when the device suspend state changes. Cleared by writing to SIE_STATUS.SUSPENDED"]
157    #[inline(always)]
158    pub fn dev_suspend(&self) -> DEV_SUSPEND_R {
159        DEV_SUSPEND_R::new(((self.bits >> 14) & 1) != 0)
160    }
161    #[doc = "Bit 15 - Set when the device receives a resume from the host. Cleared by writing to SIE_STATUS.RESUME"]
162    #[inline(always)]
163    pub fn dev_resume_from_host(&self) -> DEV_RESUME_FROM_HOST_R {
164        DEV_RESUME_FROM_HOST_R::new(((self.bits >> 15) & 1) != 0)
165    }
166    #[doc = "Bit 16 - Device. Source: SIE_STATUS.SETUP_REC"]
167    #[inline(always)]
168    pub fn setup_req(&self) -> SETUP_REQ_R {
169        SETUP_REQ_R::new(((self.bits >> 16) & 1) != 0)
170    }
171    #[doc = "Bit 17 - Set every time the device receives a SOF (Start of Frame) packet. Cleared by reading SOF_RD"]
172    #[inline(always)]
173    pub fn dev_sof(&self) -> DEV_SOF_R {
174        DEV_SOF_R::new(((self.bits >> 17) & 1) != 0)
175    }
176    #[doc = "Bit 18 - Raised when any bit in ABORT_DONE is set. Clear by clearing all bits in ABORT_DONE."]
177    #[inline(always)]
178    pub fn abort_done(&self) -> ABORT_DONE_R {
179        ABORT_DONE_R::new(((self.bits >> 18) & 1) != 0)
180    }
181    #[doc = "Bit 19 - Raised when any bit in EP_STATUS_STALL_NAK is set. Clear by clearing all bits in EP_STATUS_STALL_NAK."]
182    #[inline(always)]
183    pub fn ep_stall_nak(&self) -> EP_STALL_NAK_R {
184        EP_STALL_NAK_R::new(((self.bits >> 19) & 1) != 0)
185    }
186}
187impl W {
188    #[doc = "Bit 0 - Host: raised when a device is connected or disconnected (i.e. when SIE_STATUS.SPEED changes). Cleared by writing to SIE_STATUS.SPEED"]
189    #[inline(always)]
190    #[must_use]
191    pub fn host_conn_dis(&mut self) -> HOST_CONN_DIS_W<INTE_SPEC> {
192        HOST_CONN_DIS_W::new(self, 0)
193    }
194    #[doc = "Bit 1 - Host: raised when a device wakes up the host. Cleared by writing to SIE_STATUS.RESUME"]
195    #[inline(always)]
196    #[must_use]
197    pub fn host_resume(&mut self) -> HOST_RESUME_W<INTE_SPEC> {
198        HOST_RESUME_W::new(self, 1)
199    }
200    #[doc = "Bit 2 - Host: raised every time the host sends a SOF (Start of Frame). Cleared by reading SOF_RD"]
201    #[inline(always)]
202    #[must_use]
203    pub fn host_sof(&mut self) -> HOST_SOF_W<INTE_SPEC> {
204        HOST_SOF_W::new(self, 2)
205    }
206    #[doc = "Bit 3 - Raised every time SIE_STATUS.TRANS_COMPLETE is set. Clear by writing to this bit."]
207    #[inline(always)]
208    #[must_use]
209    pub fn trans_complete(&mut self) -> TRANS_COMPLETE_W<INTE_SPEC> {
210        TRANS_COMPLETE_W::new(self, 3)
211    }
212    #[doc = "Bit 4 - Raised when any bit in BUFF_STATUS is set. Clear by clearing all bits in BUFF_STATUS."]
213    #[inline(always)]
214    #[must_use]
215    pub fn buff_status(&mut self) -> BUFF_STATUS_W<INTE_SPEC> {
216        BUFF_STATUS_W::new(self, 4)
217    }
218    #[doc = "Bit 5 - Source: SIE_STATUS.DATA_SEQ_ERROR"]
219    #[inline(always)]
220    #[must_use]
221    pub fn error_data_seq(&mut self) -> ERROR_DATA_SEQ_W<INTE_SPEC> {
222        ERROR_DATA_SEQ_W::new(self, 5)
223    }
224    #[doc = "Bit 6 - Source: SIE_STATUS.RX_TIMEOUT"]
225    #[inline(always)]
226    #[must_use]
227    pub fn error_rx_timeout(&mut self) -> ERROR_RX_TIMEOUT_W<INTE_SPEC> {
228        ERROR_RX_TIMEOUT_W::new(self, 6)
229    }
230    #[doc = "Bit 7 - Source: SIE_STATUS.RX_OVERFLOW"]
231    #[inline(always)]
232    #[must_use]
233    pub fn error_rx_overflow(&mut self) -> ERROR_RX_OVERFLOW_W<INTE_SPEC> {
234        ERROR_RX_OVERFLOW_W::new(self, 7)
235    }
236    #[doc = "Bit 8 - Source: SIE_STATUS.BIT_STUFF_ERROR"]
237    #[inline(always)]
238    #[must_use]
239    pub fn error_bit_stuff(&mut self) -> ERROR_BIT_STUFF_W<INTE_SPEC> {
240        ERROR_BIT_STUFF_W::new(self, 8)
241    }
242    #[doc = "Bit 9 - Source: SIE_STATUS.CRC_ERROR"]
243    #[inline(always)]
244    #[must_use]
245    pub fn error_crc(&mut self) -> ERROR_CRC_W<INTE_SPEC> {
246        ERROR_CRC_W::new(self, 9)
247    }
248    #[doc = "Bit 10 - Source: SIE_STATUS.STALL_REC"]
249    #[inline(always)]
250    #[must_use]
251    pub fn stall(&mut self) -> STALL_W<INTE_SPEC> {
252        STALL_W::new(self, 10)
253    }
254    #[doc = "Bit 11 - Source: SIE_STATUS.VBUS_DETECTED"]
255    #[inline(always)]
256    #[must_use]
257    pub fn vbus_detect(&mut self) -> VBUS_DETECT_W<INTE_SPEC> {
258        VBUS_DETECT_W::new(self, 11)
259    }
260    #[doc = "Bit 12 - Source: SIE_STATUS.BUS_RESET"]
261    #[inline(always)]
262    #[must_use]
263    pub fn bus_reset(&mut self) -> BUS_RESET_W<INTE_SPEC> {
264        BUS_RESET_W::new(self, 12)
265    }
266    #[doc = "Bit 13 - Set when the device connection state changes. Cleared by writing to SIE_STATUS.CONNECTED"]
267    #[inline(always)]
268    #[must_use]
269    pub fn dev_conn_dis(&mut self) -> DEV_CONN_DIS_W<INTE_SPEC> {
270        DEV_CONN_DIS_W::new(self, 13)
271    }
272    #[doc = "Bit 14 - Set when the device suspend state changes. Cleared by writing to SIE_STATUS.SUSPENDED"]
273    #[inline(always)]
274    #[must_use]
275    pub fn dev_suspend(&mut self) -> DEV_SUSPEND_W<INTE_SPEC> {
276        DEV_SUSPEND_W::new(self, 14)
277    }
278    #[doc = "Bit 15 - Set when the device receives a resume from the host. Cleared by writing to SIE_STATUS.RESUME"]
279    #[inline(always)]
280    #[must_use]
281    pub fn dev_resume_from_host(&mut self) -> DEV_RESUME_FROM_HOST_W<INTE_SPEC> {
282        DEV_RESUME_FROM_HOST_W::new(self, 15)
283    }
284    #[doc = "Bit 16 - Device. Source: SIE_STATUS.SETUP_REC"]
285    #[inline(always)]
286    #[must_use]
287    pub fn setup_req(&mut self) -> SETUP_REQ_W<INTE_SPEC> {
288        SETUP_REQ_W::new(self, 16)
289    }
290    #[doc = "Bit 17 - Set every time the device receives a SOF (Start of Frame) packet. Cleared by reading SOF_RD"]
291    #[inline(always)]
292    #[must_use]
293    pub fn dev_sof(&mut self) -> DEV_SOF_W<INTE_SPEC> {
294        DEV_SOF_W::new(self, 17)
295    }
296    #[doc = "Bit 18 - Raised when any bit in ABORT_DONE is set. Clear by clearing all bits in ABORT_DONE."]
297    #[inline(always)]
298    #[must_use]
299    pub fn abort_done(&mut self) -> ABORT_DONE_W<INTE_SPEC> {
300        ABORT_DONE_W::new(self, 18)
301    }
302    #[doc = "Bit 19 - Raised when any bit in EP_STATUS_STALL_NAK is set. Clear by clearing all bits in EP_STATUS_STALL_NAK."]
303    #[inline(always)]
304    #[must_use]
305    pub fn ep_stall_nak(&mut self) -> EP_STALL_NAK_W<INTE_SPEC> {
306        EP_STALL_NAK_W::new(self, 19)
307    }
308    #[doc = r" Writes raw bits to the register."]
309    #[doc = r""]
310    #[doc = r" # Safety"]
311    #[doc = r""]
312    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
313    #[inline(always)]
314    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
315        self.bits = bits;
316        self
317    }
318}
319#[doc = "Interrupt Enable  
320
321You can [`read`](crate::generic::Reg::read) this register and get [`inte::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
322pub struct INTE_SPEC;
323impl crate::RegisterSpec for INTE_SPEC {
324    type Ux = u32;
325}
326#[doc = "`read()` method returns [`inte::R`](R) reader structure"]
327impl crate::Readable for INTE_SPEC {}
328#[doc = "`write(|w| ..)` method takes [`inte::W`](W) writer structure"]
329impl crate::Writable for INTE_SPEC {
330    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
331    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
332}
333#[doc = "`reset()` method sets INTE to value 0"]
334impl crate::Resettable for INTE_SPEC {
335    const RESET_VALUE: u32 = 0;
336}
rp2040_pac/usbctrl_regs/inte.rs

rp2040_pac/usbctrl_regs/
inte.rs
