rp2040_pac/io_qspi/gpio_qspi/
gpio_ctrl.rs

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1#[doc = "Register `GPIO_CTRL` reader"]
2pub type R = crate::R<GPIO_CTRL_SPEC>;
3#[doc = "Register `GPIO_CTRL` writer"]
4pub type W = crate::W<GPIO_CTRL_SPEC>;
5#[doc = "Field `FUNCSEL` reader - 0-31 -> selects pin function according to the gpio table  
6 31 == NULL"]
7pub type FUNCSEL_R = crate::FieldReader<FUNCSEL_A>;
8#[doc = "0-31 -> selects pin function according to the gpio table  
9 31 == NULL  
10
11Value on reset: 31"]
12#[derive(Clone, Copy, Debug, PartialEq, Eq)]
13#[repr(u8)]
14pub enum FUNCSEL_A {
15    #[doc = "0: `0`"]
16    XIP_SCLK = 0,
17    #[doc = "5: `101`"]
18    SIO_30 = 5,
19    #[doc = "31: `11111`"]
20    NULL = 31,
21}
22impl From<FUNCSEL_A> for u8 {
23    #[inline(always)]
24    fn from(variant: FUNCSEL_A) -> Self {
25        variant as _
26    }
27}
28impl crate::FieldSpec for FUNCSEL_A {
29    type Ux = u8;
30}
31impl FUNCSEL_R {
32    #[doc = "Get enumerated values variant"]
33    #[inline(always)]
34    pub const fn variant(&self) -> Option<FUNCSEL_A> {
35        match self.bits {
36            0 => Some(FUNCSEL_A::XIP_SCLK),
37            5 => Some(FUNCSEL_A::SIO_30),
38            31 => Some(FUNCSEL_A::NULL),
39            _ => None,
40        }
41    }
42    #[doc = "`0`"]
43    #[inline(always)]
44    pub fn is_xip_sclk(&self) -> bool {
45        *self == FUNCSEL_A::XIP_SCLK
46    }
47    #[doc = "`101`"]
48    #[inline(always)]
49    pub fn is_sio_30(&self) -> bool {
50        *self == FUNCSEL_A::SIO_30
51    }
52    #[doc = "`11111`"]
53    #[inline(always)]
54    pub fn is_null(&self) -> bool {
55        *self == FUNCSEL_A::NULL
56    }
57}
58#[doc = "Field `FUNCSEL` writer - 0-31 -> selects pin function according to the gpio table  
59 31 == NULL"]
60pub type FUNCSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 5, FUNCSEL_A>;
61impl<'a, REG> FUNCSEL_W<'a, REG>
62where
63    REG: crate::Writable + crate::RegisterSpec,
64    REG::Ux: From<u8>,
65{
66    #[doc = "`0`"]
67    #[inline(always)]
68    pub fn xip_sclk(self) -> &'a mut crate::W<REG> {
69        self.variant(FUNCSEL_A::XIP_SCLK)
70    }
71    #[doc = "`101`"]
72    #[inline(always)]
73    pub fn sio_30(self) -> &'a mut crate::W<REG> {
74        self.variant(FUNCSEL_A::SIO_30)
75    }
76    #[doc = "`11111`"]
77    #[inline(always)]
78    pub fn null(self) -> &'a mut crate::W<REG> {
79        self.variant(FUNCSEL_A::NULL)
80    }
81}
82#[doc = "Field `OUTOVER` reader - "]
83pub type OUTOVER_R = crate::FieldReader<OUTOVER_A>;
84#[doc = "  
85
86Value on reset: 0"]
87#[derive(Clone, Copy, Debug, PartialEq, Eq)]
88#[repr(u8)]
89pub enum OUTOVER_A {
90    #[doc = "0: drive output from peripheral signal selected by funcsel"]
91    NORMAL = 0,
92    #[doc = "1: drive output from inverse of peripheral signal selected by funcsel"]
93    INVERT = 1,
94    #[doc = "2: drive output low"]
95    LOW = 2,
96    #[doc = "3: drive output high"]
97    HIGH = 3,
98}
99impl From<OUTOVER_A> for u8 {
100    #[inline(always)]
101    fn from(variant: OUTOVER_A) -> Self {
102        variant as _
103    }
104}
105impl crate::FieldSpec for OUTOVER_A {
106    type Ux = u8;
107}
108impl OUTOVER_R {
109    #[doc = "Get enumerated values variant"]
110    #[inline(always)]
111    pub const fn variant(&self) -> OUTOVER_A {
112        match self.bits {
113            0 => OUTOVER_A::NORMAL,
114            1 => OUTOVER_A::INVERT,
115            2 => OUTOVER_A::LOW,
116            3 => OUTOVER_A::HIGH,
117            _ => unreachable!(),
118        }
119    }
120    #[doc = "drive output from peripheral signal selected by funcsel"]
121    #[inline(always)]
122    pub fn is_normal(&self) -> bool {
123        *self == OUTOVER_A::NORMAL
124    }
125    #[doc = "drive output from inverse of peripheral signal selected by funcsel"]
126    #[inline(always)]
127    pub fn is_invert(&self) -> bool {
128        *self == OUTOVER_A::INVERT
129    }
130    #[doc = "drive output low"]
131    #[inline(always)]
132    pub fn is_low(&self) -> bool {
133        *self == OUTOVER_A::LOW
134    }
135    #[doc = "drive output high"]
136    #[inline(always)]
137    pub fn is_high(&self) -> bool {
138        *self == OUTOVER_A::HIGH
139    }
140}
141#[doc = "Field `OUTOVER` writer - "]
142pub type OUTOVER_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, OUTOVER_A>;
143impl<'a, REG> OUTOVER_W<'a, REG>
144where
145    REG: crate::Writable + crate::RegisterSpec,
146    REG::Ux: From<u8>,
147{
148    #[doc = "drive output from peripheral signal selected by funcsel"]
149    #[inline(always)]
150    pub fn normal(self) -> &'a mut crate::W<REG> {
151        self.variant(OUTOVER_A::NORMAL)
152    }
153    #[doc = "drive output from inverse of peripheral signal selected by funcsel"]
154    #[inline(always)]
155    pub fn invert(self) -> &'a mut crate::W<REG> {
156        self.variant(OUTOVER_A::INVERT)
157    }
158    #[doc = "drive output low"]
159    #[inline(always)]
160    pub fn low(self) -> &'a mut crate::W<REG> {
161        self.variant(OUTOVER_A::LOW)
162    }
163    #[doc = "drive output high"]
164    #[inline(always)]
165    pub fn high(self) -> &'a mut crate::W<REG> {
166        self.variant(OUTOVER_A::HIGH)
167    }
168}
169#[doc = "Field `OEOVER` reader - "]
170pub type OEOVER_R = crate::FieldReader<OEOVER_A>;
171#[doc = "  
172
173Value on reset: 0"]
174#[derive(Clone, Copy, Debug, PartialEq, Eq)]
175#[repr(u8)]
176pub enum OEOVER_A {
177    #[doc = "0: drive output enable from peripheral signal selected by funcsel"]
178    NORMAL = 0,
179    #[doc = "1: drive output enable from inverse of peripheral signal selected by funcsel"]
180    INVERT = 1,
181    #[doc = "2: disable output"]
182    DISABLE = 2,
183    #[doc = "3: enable output"]
184    ENABLE = 3,
185}
186impl From<OEOVER_A> for u8 {
187    #[inline(always)]
188    fn from(variant: OEOVER_A) -> Self {
189        variant as _
190    }
191}
192impl crate::FieldSpec for OEOVER_A {
193    type Ux = u8;
194}
195impl OEOVER_R {
196    #[doc = "Get enumerated values variant"]
197    #[inline(always)]
198    pub const fn variant(&self) -> OEOVER_A {
199        match self.bits {
200            0 => OEOVER_A::NORMAL,
201            1 => OEOVER_A::INVERT,
202            2 => OEOVER_A::DISABLE,
203            3 => OEOVER_A::ENABLE,
204            _ => unreachable!(),
205        }
206    }
207    #[doc = "drive output enable from peripheral signal selected by funcsel"]
208    #[inline(always)]
209    pub fn is_normal(&self) -> bool {
210        *self == OEOVER_A::NORMAL
211    }
212    #[doc = "drive output enable from inverse of peripheral signal selected by funcsel"]
213    #[inline(always)]
214    pub fn is_invert(&self) -> bool {
215        *self == OEOVER_A::INVERT
216    }
217    #[doc = "disable output"]
218    #[inline(always)]
219    pub fn is_disable(&self) -> bool {
220        *self == OEOVER_A::DISABLE
221    }
222    #[doc = "enable output"]
223    #[inline(always)]
224    pub fn is_enable(&self) -> bool {
225        *self == OEOVER_A::ENABLE
226    }
227}
228#[doc = "Field `OEOVER` writer - "]
229pub type OEOVER_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, OEOVER_A>;
230impl<'a, REG> OEOVER_W<'a, REG>
231where
232    REG: crate::Writable + crate::RegisterSpec,
233    REG::Ux: From<u8>,
234{
235    #[doc = "drive output enable from peripheral signal selected by funcsel"]
236    #[inline(always)]
237    pub fn normal(self) -> &'a mut crate::W<REG> {
238        self.variant(OEOVER_A::NORMAL)
239    }
240    #[doc = "drive output enable from inverse of peripheral signal selected by funcsel"]
241    #[inline(always)]
242    pub fn invert(self) -> &'a mut crate::W<REG> {
243        self.variant(OEOVER_A::INVERT)
244    }
245    #[doc = "disable output"]
246    #[inline(always)]
247    pub fn disable(self) -> &'a mut crate::W<REG> {
248        self.variant(OEOVER_A::DISABLE)
249    }
250    #[doc = "enable output"]
251    #[inline(always)]
252    pub fn enable(self) -> &'a mut crate::W<REG> {
253        self.variant(OEOVER_A::ENABLE)
254    }
255}
256#[doc = "Field `INOVER` reader - "]
257pub type INOVER_R = crate::FieldReader<INOVER_A>;
258#[doc = "  
259
260Value on reset: 0"]
261#[derive(Clone, Copy, Debug, PartialEq, Eq)]
262#[repr(u8)]
263pub enum INOVER_A {
264    #[doc = "0: don't invert the peri input"]
265    NORMAL = 0,
266    #[doc = "1: invert the peri input"]
267    INVERT = 1,
268    #[doc = "2: drive peri input low"]
269    LOW = 2,
270    #[doc = "3: drive peri input high"]
271    HIGH = 3,
272}
273impl From<INOVER_A> for u8 {
274    #[inline(always)]
275    fn from(variant: INOVER_A) -> Self {
276        variant as _
277    }
278}
279impl crate::FieldSpec for INOVER_A {
280    type Ux = u8;
281}
282impl INOVER_R {
283    #[doc = "Get enumerated values variant"]
284    #[inline(always)]
285    pub const fn variant(&self) -> INOVER_A {
286        match self.bits {
287            0 => INOVER_A::NORMAL,
288            1 => INOVER_A::INVERT,
289            2 => INOVER_A::LOW,
290            3 => INOVER_A::HIGH,
291            _ => unreachable!(),
292        }
293    }
294    #[doc = "don't invert the peri input"]
295    #[inline(always)]
296    pub fn is_normal(&self) -> bool {
297        *self == INOVER_A::NORMAL
298    }
299    #[doc = "invert the peri input"]
300    #[inline(always)]
301    pub fn is_invert(&self) -> bool {
302        *self == INOVER_A::INVERT
303    }
304    #[doc = "drive peri input low"]
305    #[inline(always)]
306    pub fn is_low(&self) -> bool {
307        *self == INOVER_A::LOW
308    }
309    #[doc = "drive peri input high"]
310    #[inline(always)]
311    pub fn is_high(&self) -> bool {
312        *self == INOVER_A::HIGH
313    }
314}
315#[doc = "Field `INOVER` writer - "]
316pub type INOVER_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, INOVER_A>;
317impl<'a, REG> INOVER_W<'a, REG>
318where
319    REG: crate::Writable + crate::RegisterSpec,
320    REG::Ux: From<u8>,
321{
322    #[doc = "don't invert the peri input"]
323    #[inline(always)]
324    pub fn normal(self) -> &'a mut crate::W<REG> {
325        self.variant(INOVER_A::NORMAL)
326    }
327    #[doc = "invert the peri input"]
328    #[inline(always)]
329    pub fn invert(self) -> &'a mut crate::W<REG> {
330        self.variant(INOVER_A::INVERT)
331    }
332    #[doc = "drive peri input low"]
333    #[inline(always)]
334    pub fn low(self) -> &'a mut crate::W<REG> {
335        self.variant(INOVER_A::LOW)
336    }
337    #[doc = "drive peri input high"]
338    #[inline(always)]
339    pub fn high(self) -> &'a mut crate::W<REG> {
340        self.variant(INOVER_A::HIGH)
341    }
342}
343#[doc = "Field `IRQOVER` reader - "]
344pub type IRQOVER_R = crate::FieldReader<IRQOVER_A>;
345#[doc = "  
346
347Value on reset: 0"]
348#[derive(Clone, Copy, Debug, PartialEq, Eq)]
349#[repr(u8)]
350pub enum IRQOVER_A {
351    #[doc = "0: don't invert the interrupt"]
352    NORMAL = 0,
353    #[doc = "1: invert the interrupt"]
354    INVERT = 1,
355    #[doc = "2: drive interrupt low"]
356    LOW = 2,
357    #[doc = "3: drive interrupt high"]
358    HIGH = 3,
359}
360impl From<IRQOVER_A> for u8 {
361    #[inline(always)]
362    fn from(variant: IRQOVER_A) -> Self {
363        variant as _
364    }
365}
366impl crate::FieldSpec for IRQOVER_A {
367    type Ux = u8;
368}
369impl IRQOVER_R {
370    #[doc = "Get enumerated values variant"]
371    #[inline(always)]
372    pub const fn variant(&self) -> IRQOVER_A {
373        match self.bits {
374            0 => IRQOVER_A::NORMAL,
375            1 => IRQOVER_A::INVERT,
376            2 => IRQOVER_A::LOW,
377            3 => IRQOVER_A::HIGH,
378            _ => unreachable!(),
379        }
380    }
381    #[doc = "don't invert the interrupt"]
382    #[inline(always)]
383    pub fn is_normal(&self) -> bool {
384        *self == IRQOVER_A::NORMAL
385    }
386    #[doc = "invert the interrupt"]
387    #[inline(always)]
388    pub fn is_invert(&self) -> bool {
389        *self == IRQOVER_A::INVERT
390    }
391    #[doc = "drive interrupt low"]
392    #[inline(always)]
393    pub fn is_low(&self) -> bool {
394        *self == IRQOVER_A::LOW
395    }
396    #[doc = "drive interrupt high"]
397    #[inline(always)]
398    pub fn is_high(&self) -> bool {
399        *self == IRQOVER_A::HIGH
400    }
401}
402#[doc = "Field `IRQOVER` writer - "]
403pub type IRQOVER_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, IRQOVER_A>;
404impl<'a, REG> IRQOVER_W<'a, REG>
405where
406    REG: crate::Writable + crate::RegisterSpec,
407    REG::Ux: From<u8>,
408{
409    #[doc = "don't invert the interrupt"]
410    #[inline(always)]
411    pub fn normal(self) -> &'a mut crate::W<REG> {
412        self.variant(IRQOVER_A::NORMAL)
413    }
414    #[doc = "invert the interrupt"]
415    #[inline(always)]
416    pub fn invert(self) -> &'a mut crate::W<REG> {
417        self.variant(IRQOVER_A::INVERT)
418    }
419    #[doc = "drive interrupt low"]
420    #[inline(always)]
421    pub fn low(self) -> &'a mut crate::W<REG> {
422        self.variant(IRQOVER_A::LOW)
423    }
424    #[doc = "drive interrupt high"]
425    #[inline(always)]
426    pub fn high(self) -> &'a mut crate::W<REG> {
427        self.variant(IRQOVER_A::HIGH)
428    }
429}
430impl R {
431    #[doc = "Bits 0:4 - 0-31 -> selects pin function according to the gpio table  
432 31 == NULL"]
433    #[inline(always)]
434    pub fn funcsel(&self) -> FUNCSEL_R {
435        FUNCSEL_R::new((self.bits & 0x1f) as u8)
436    }
437    #[doc = "Bits 8:9"]
438    #[inline(always)]
439    pub fn outover(&self) -> OUTOVER_R {
440        OUTOVER_R::new(((self.bits >> 8) & 3) as u8)
441    }
442    #[doc = "Bits 12:13"]
443    #[inline(always)]
444    pub fn oeover(&self) -> OEOVER_R {
445        OEOVER_R::new(((self.bits >> 12) & 3) as u8)
446    }
447    #[doc = "Bits 16:17"]
448    #[inline(always)]
449    pub fn inover(&self) -> INOVER_R {
450        INOVER_R::new(((self.bits >> 16) & 3) as u8)
451    }
452    #[doc = "Bits 28:29"]
453    #[inline(always)]
454    pub fn irqover(&self) -> IRQOVER_R {
455        IRQOVER_R::new(((self.bits >> 28) & 3) as u8)
456    }
457}
458impl W {
459    #[doc = "Bits 0:4 - 0-31 -> selects pin function according to the gpio table  
460 31 == NULL"]
461    #[inline(always)]
462    #[must_use]
463    pub fn funcsel(&mut self) -> FUNCSEL_W<GPIO_CTRL_SPEC> {
464        FUNCSEL_W::new(self, 0)
465    }
466    #[doc = "Bits 8:9"]
467    #[inline(always)]
468    #[must_use]
469    pub fn outover(&mut self) -> OUTOVER_W<GPIO_CTRL_SPEC> {
470        OUTOVER_W::new(self, 8)
471    }
472    #[doc = "Bits 12:13"]
473    #[inline(always)]
474    #[must_use]
475    pub fn oeover(&mut self) -> OEOVER_W<GPIO_CTRL_SPEC> {
476        OEOVER_W::new(self, 12)
477    }
478    #[doc = "Bits 16:17"]
479    #[inline(always)]
480    #[must_use]
481    pub fn inover(&mut self) -> INOVER_W<GPIO_CTRL_SPEC> {
482        INOVER_W::new(self, 16)
483    }
484    #[doc = "Bits 28:29"]
485    #[inline(always)]
486    #[must_use]
487    pub fn irqover(&mut self) -> IRQOVER_W<GPIO_CTRL_SPEC> {
488        IRQOVER_W::new(self, 28)
489    }
490    #[doc = r" Writes raw bits to the register."]
491    #[doc = r""]
492    #[doc = r" # Safety"]
493    #[doc = r""]
494    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
495    #[inline(always)]
496    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
497        self.bits = bits;
498        self
499    }
500}
501#[doc = "GPIO control including function select and overrides.  
502
503You can [`read`](crate::generic::Reg::read) this register and get [`gpio_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
504pub struct GPIO_CTRL_SPEC;
505impl crate::RegisterSpec for GPIO_CTRL_SPEC {
506    type Ux = u32;
507}
508#[doc = "`read()` method returns [`gpio_ctrl::R`](R) reader structure"]
509impl crate::Readable for GPIO_CTRL_SPEC {}
510#[doc = "`write(|w| ..)` method takes [`gpio_ctrl::W`](W) writer structure"]
511impl crate::Writable for GPIO_CTRL_SPEC {
512    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
513    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
514}
515#[doc = "`reset()` method sets GPIO_CTRL to value 0x1f"]
516impl crate::Resettable for GPIO_CTRL_SPEC {
517    const RESET_VALUE: u32 = 0x1f;
518}
rp2040_pac/io_qspi/gpio_qspi/gpio_ctrl.rs

rp2040_pac/io_qspi/gpio_qspi/
gpio_ctrl.rs
