rp2040_pac/pio0/sm_irq/
irq_intf.rs
1#[doc = "Register `IRQ_INTF` reader"]
2pub type R = crate::R<IRQ_INTF_SPEC>;
3#[doc = "Register `IRQ_INTF` writer"]
4pub type W = crate::W<IRQ_INTF_SPEC>;
5#[doc = "Field `SM0_RXNEMPTY` reader - "]
6pub type SM0_RXNEMPTY_R = crate::BitReader;
7#[doc = "Field `SM0_RXNEMPTY` writer - "]
8pub type SM0_RXNEMPTY_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SM1_RXNEMPTY` reader - "]
10pub type SM1_RXNEMPTY_R = crate::BitReader;
11#[doc = "Field `SM1_RXNEMPTY` writer - "]
12pub type SM1_RXNEMPTY_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SM2_RXNEMPTY` reader - "]
14pub type SM2_RXNEMPTY_R = crate::BitReader;
15#[doc = "Field `SM2_RXNEMPTY` writer - "]
16pub type SM2_RXNEMPTY_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SM3_RXNEMPTY` reader - "]
18pub type SM3_RXNEMPTY_R = crate::BitReader;
19#[doc = "Field `SM3_RXNEMPTY` writer - "]
20pub type SM3_RXNEMPTY_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `SM0_TXNFULL` reader - "]
22pub type SM0_TXNFULL_R = crate::BitReader;
23#[doc = "Field `SM0_TXNFULL` writer - "]
24pub type SM0_TXNFULL_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `SM1_TXNFULL` reader - "]
26pub type SM1_TXNFULL_R = crate::BitReader;
27#[doc = "Field `SM1_TXNFULL` writer - "]
28pub type SM1_TXNFULL_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `SM2_TXNFULL` reader - "]
30pub type SM2_TXNFULL_R = crate::BitReader;
31#[doc = "Field `SM2_TXNFULL` writer - "]
32pub type SM2_TXNFULL_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `SM3_TXNFULL` reader - "]
34pub type SM3_TXNFULL_R = crate::BitReader;
35#[doc = "Field `SM3_TXNFULL` writer - "]
36pub type SM3_TXNFULL_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `SM0` reader - "]
38pub type SM0_R = crate::BitReader;
39#[doc = "Field `SM0` writer - "]
40pub type SM0_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `SM1` reader - "]
42pub type SM1_R = crate::BitReader;
43#[doc = "Field `SM1` writer - "]
44pub type SM1_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `SM2` reader - "]
46pub type SM2_R = crate::BitReader;
47#[doc = "Field `SM2` writer - "]
48pub type SM2_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `SM3` reader - "]
50pub type SM3_R = crate::BitReader;
51#[doc = "Field `SM3` writer - "]
52pub type SM3_W<'a, REG> = crate::BitWriter<'a, REG>;
53impl R {
54 #[doc = "Bit 0"]
55 #[inline(always)]
56 pub fn sm0_rxnempty(&self) -> SM0_RXNEMPTY_R {
57 SM0_RXNEMPTY_R::new((self.bits & 1) != 0)
58 }
59 #[doc = "Bit 1"]
60 #[inline(always)]
61 pub fn sm1_rxnempty(&self) -> SM1_RXNEMPTY_R {
62 SM1_RXNEMPTY_R::new(((self.bits >> 1) & 1) != 0)
63 }
64 #[doc = "Bit 2"]
65 #[inline(always)]
66 pub fn sm2_rxnempty(&self) -> SM2_RXNEMPTY_R {
67 SM2_RXNEMPTY_R::new(((self.bits >> 2) & 1) != 0)
68 }
69 #[doc = "Bit 3"]
70 #[inline(always)]
71 pub fn sm3_rxnempty(&self) -> SM3_RXNEMPTY_R {
72 SM3_RXNEMPTY_R::new(((self.bits >> 3) & 1) != 0)
73 }
74 #[doc = "Bit 4"]
75 #[inline(always)]
76 pub fn sm0_txnfull(&self) -> SM0_TXNFULL_R {
77 SM0_TXNFULL_R::new(((self.bits >> 4) & 1) != 0)
78 }
79 #[doc = "Bit 5"]
80 #[inline(always)]
81 pub fn sm1_txnfull(&self) -> SM1_TXNFULL_R {
82 SM1_TXNFULL_R::new(((self.bits >> 5) & 1) != 0)
83 }
84 #[doc = "Bit 6"]
85 #[inline(always)]
86 pub fn sm2_txnfull(&self) -> SM2_TXNFULL_R {
87 SM2_TXNFULL_R::new(((self.bits >> 6) & 1) != 0)
88 }
89 #[doc = "Bit 7"]
90 #[inline(always)]
91 pub fn sm3_txnfull(&self) -> SM3_TXNFULL_R {
92 SM3_TXNFULL_R::new(((self.bits >> 7) & 1) != 0)
93 }
94 #[doc = "Bit 8"]
95 #[inline(always)]
96 pub fn sm0(&self) -> SM0_R {
97 SM0_R::new(((self.bits >> 8) & 1) != 0)
98 }
99 #[doc = "Bit 9"]
100 #[inline(always)]
101 pub fn sm1(&self) -> SM1_R {
102 SM1_R::new(((self.bits >> 9) & 1) != 0)
103 }
104 #[doc = "Bit 10"]
105 #[inline(always)]
106 pub fn sm2(&self) -> SM2_R {
107 SM2_R::new(((self.bits >> 10) & 1) != 0)
108 }
109 #[doc = "Bit 11"]
110 #[inline(always)]
111 pub fn sm3(&self) -> SM3_R {
112 SM3_R::new(((self.bits >> 11) & 1) != 0)
113 }
114}
115impl W {
116 #[doc = "Bit 0"]
117 #[inline(always)]
118 #[must_use]
119 pub fn sm0_rxnempty(&mut self) -> SM0_RXNEMPTY_W<IRQ_INTF_SPEC> {
120 SM0_RXNEMPTY_W::new(self, 0)
121 }
122 #[doc = "Bit 1"]
123 #[inline(always)]
124 #[must_use]
125 pub fn sm1_rxnempty(&mut self) -> SM1_RXNEMPTY_W<IRQ_INTF_SPEC> {
126 SM1_RXNEMPTY_W::new(self, 1)
127 }
128 #[doc = "Bit 2"]
129 #[inline(always)]
130 #[must_use]
131 pub fn sm2_rxnempty(&mut self) -> SM2_RXNEMPTY_W<IRQ_INTF_SPEC> {
132 SM2_RXNEMPTY_W::new(self, 2)
133 }
134 #[doc = "Bit 3"]
135 #[inline(always)]
136 #[must_use]
137 pub fn sm3_rxnempty(&mut self) -> SM3_RXNEMPTY_W<IRQ_INTF_SPEC> {
138 SM3_RXNEMPTY_W::new(self, 3)
139 }
140 #[doc = "Bit 4"]
141 #[inline(always)]
142 #[must_use]
143 pub fn sm0_txnfull(&mut self) -> SM0_TXNFULL_W<IRQ_INTF_SPEC> {
144 SM0_TXNFULL_W::new(self, 4)
145 }
146 #[doc = "Bit 5"]
147 #[inline(always)]
148 #[must_use]
149 pub fn sm1_txnfull(&mut self) -> SM1_TXNFULL_W<IRQ_INTF_SPEC> {
150 SM1_TXNFULL_W::new(self, 5)
151 }
152 #[doc = "Bit 6"]
153 #[inline(always)]
154 #[must_use]
155 pub fn sm2_txnfull(&mut self) -> SM2_TXNFULL_W<IRQ_INTF_SPEC> {
156 SM2_TXNFULL_W::new(self, 6)
157 }
158 #[doc = "Bit 7"]
159 #[inline(always)]
160 #[must_use]
161 pub fn sm3_txnfull(&mut self) -> SM3_TXNFULL_W<IRQ_INTF_SPEC> {
162 SM3_TXNFULL_W::new(self, 7)
163 }
164 #[doc = "Bit 8"]
165 #[inline(always)]
166 #[must_use]
167 pub fn sm0(&mut self) -> SM0_W<IRQ_INTF_SPEC> {
168 SM0_W::new(self, 8)
169 }
170 #[doc = "Bit 9"]
171 #[inline(always)]
172 #[must_use]
173 pub fn sm1(&mut self) -> SM1_W<IRQ_INTF_SPEC> {
174 SM1_W::new(self, 9)
175 }
176 #[doc = "Bit 10"]
177 #[inline(always)]
178 #[must_use]
179 pub fn sm2(&mut self) -> SM2_W<IRQ_INTF_SPEC> {
180 SM2_W::new(self, 10)
181 }
182 #[doc = "Bit 11"]
183 #[inline(always)]
184 #[must_use]
185 pub fn sm3(&mut self) -> SM3_W<IRQ_INTF_SPEC> {
186 SM3_W::new(self, 11)
187 }
188 #[doc = r" Writes raw bits to the register."]
189 #[doc = r""]
190 #[doc = r" # Safety"]
191 #[doc = r""]
192 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
193 #[inline(always)]
194 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
195 self.bits = bits;
196 self
197 }
198}
199#[doc = "Interrupt Force for irq0
200
201You can [`read`](crate::generic::Reg::read) this register and get [`irq_intf::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_intf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
202pub struct IRQ_INTF_SPEC;
203impl crate::RegisterSpec for IRQ_INTF_SPEC {
204 type Ux = u32;
205}
206#[doc = "`read()` method returns [`irq_intf::R`](R) reader structure"]
207impl crate::Readable for IRQ_INTF_SPEC {}
208#[doc = "`write(|w| ..)` method takes [`irq_intf::W`](W) writer structure"]
209impl crate::Writable for IRQ_INTF_SPEC {
210 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
211 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
212}
213#[doc = "`reset()` method sets IRQ_INTF to value 0"]
214impl crate::Resettable for IRQ_INTF_SPEC {
215 const RESET_VALUE: u32 = 0;
216}