nrf52840_pac/i2s/config/
swidth.rs
1#[doc = "Register `SWIDTH` reader"]
2pub struct R(crate::R<SWIDTH_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<SWIDTH_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<SWIDTH_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<SWIDTH_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `SWIDTH` writer"]
17pub struct W(crate::W<SWIDTH_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<SWIDTH_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<SWIDTH_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<SWIDTH_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SWIDTH` reader - Sample width."]
38pub type SWIDTH_R = crate::FieldReader<u8, SWIDTH_A>;
39#[doc = "Sample width.\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41#[repr(u8)]
42pub enum SWIDTH_A {
43 #[doc = "0: 8 bit."]
44 _8BIT = 0,
45 #[doc = "1: 16 bit."]
46 _16BIT = 1,
47 #[doc = "2: 24 bit."]
48 _24BIT = 2,
49}
50impl From<SWIDTH_A> for u8 {
51 #[inline(always)]
52 fn from(variant: SWIDTH_A) -> Self {
53 variant as _
54 }
55}
56impl SWIDTH_R {
57 #[doc = "Get enumerated values variant"]
58 #[inline(always)]
59 pub fn variant(&self) -> Option<SWIDTH_A> {
60 match self.bits {
61 0 => Some(SWIDTH_A::_8BIT),
62 1 => Some(SWIDTH_A::_16BIT),
63 2 => Some(SWIDTH_A::_24BIT),
64 _ => None,
65 }
66 }
67 #[doc = "Checks if the value of the field is `_8BIT`"]
68 #[inline(always)]
69 pub fn is_8bit(&self) -> bool {
70 *self == SWIDTH_A::_8BIT
71 }
72 #[doc = "Checks if the value of the field is `_16BIT`"]
73 #[inline(always)]
74 pub fn is_16bit(&self) -> bool {
75 *self == SWIDTH_A::_16BIT
76 }
77 #[doc = "Checks if the value of the field is `_24BIT`"]
78 #[inline(always)]
79 pub fn is_24bit(&self) -> bool {
80 *self == SWIDTH_A::_24BIT
81 }
82}
83#[doc = "Field `SWIDTH` writer - Sample width."]
84pub type SWIDTH_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SWIDTH_SPEC, u8, SWIDTH_A, 2, O>;
85impl<'a, const O: u8> SWIDTH_W<'a, O> {
86 #[doc = "8 bit."]
87 #[inline(always)]
88 pub fn _8bit(self) -> &'a mut W {
89 self.variant(SWIDTH_A::_8BIT)
90 }
91 #[doc = "16 bit."]
92 #[inline(always)]
93 pub fn _16bit(self) -> &'a mut W {
94 self.variant(SWIDTH_A::_16BIT)
95 }
96 #[doc = "24 bit."]
97 #[inline(always)]
98 pub fn _24bit(self) -> &'a mut W {
99 self.variant(SWIDTH_A::_24BIT)
100 }
101}
102impl R {
103 #[doc = "Bits 0:1 - Sample width."]
104 #[inline(always)]
105 pub fn swidth(&self) -> SWIDTH_R {
106 SWIDTH_R::new((self.bits & 3) as u8)
107 }
108}
109impl W {
110 #[doc = "Bits 0:1 - Sample width."]
111 #[inline(always)]
112 pub fn swidth(&mut self) -> SWIDTH_W<0> {
113 SWIDTH_W::new(self)
114 }
115 #[doc = "Writes raw bits to the register."]
116 #[inline(always)]
117 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
118 self.0.bits(bits);
119 self
120 }
121}
122#[doc = "Sample width.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swidth](index.html) module"]
123pub struct SWIDTH_SPEC;
124impl crate::RegisterSpec for SWIDTH_SPEC {
125 type Ux = u32;
126}
127#[doc = "`read()` method returns [swidth::R](R) reader structure"]
128impl crate::Readable for SWIDTH_SPEC {
129 type Reader = R;
130}
131#[doc = "`write(|w| ..)` method takes [swidth::W](W) writer structure"]
132impl crate::Writable for SWIDTH_SPEC {
133 type Writer = W;
134}
135#[doc = "`reset()` method sets SWIDTH to value 0x01"]
136impl crate::Resettable for SWIDTH_SPEC {
137 #[inline(always)]
138 fn reset_value() -> Self::Ux {
139 0x01
140 }
141}