1#[doc = "Register `IC_TX_ABRT_SOURCE` reader"]
2pub type R = crate::R<IC_TX_ABRT_SOURCE_SPEC>;
3#[doc = "Field `ABRT_7B_ADDR_NOACK` reader - This field indicates that the Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave.
4
5 Reset value: 0x0
6
7 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
8pub type ABRT_7B_ADDR_NOACK_R = crate::BitReader<ABRT_7B_ADDR_NOACK_A>;
9#[doc = "This field indicates that the Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave.
10
11 Reset value: 0x0
12
13 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver
14
15Value on reset: 0"]
16#[derive(Clone, Copy, Debug, PartialEq, Eq)]
17pub enum ABRT_7B_ADDR_NOACK_A {
18 #[doc = "0: This abort is not generated"]
19 INACTIVE = 0,
20 #[doc = "1: This abort is generated because of NOACK for 7-bit address"]
21 ACTIVE = 1,
22}
23impl From<ABRT_7B_ADDR_NOACK_A> for bool {
24 #[inline(always)]
25 fn from(variant: ABRT_7B_ADDR_NOACK_A) -> Self {
26 variant as u8 != 0
27 }
28}
29impl ABRT_7B_ADDR_NOACK_R {
30 #[doc = "Get enumerated values variant"]
31 #[inline(always)]
32 pub const fn variant(&self) -> ABRT_7B_ADDR_NOACK_A {
33 match self.bits {
34 false => ABRT_7B_ADDR_NOACK_A::INACTIVE,
35 true => ABRT_7B_ADDR_NOACK_A::ACTIVE,
36 }
37 }
38 #[doc = "This abort is not generated"]
39 #[inline(always)]
40 pub fn is_inactive(&self) -> bool {
41 *self == ABRT_7B_ADDR_NOACK_A::INACTIVE
42 }
43 #[doc = "This abort is generated because of NOACK for 7-bit address"]
44 #[inline(always)]
45 pub fn is_active(&self) -> bool {
46 *self == ABRT_7B_ADDR_NOACK_A::ACTIVE
47 }
48}
49#[doc = "Field `ABRT_10ADDR1_NOACK` reader - This field indicates that the Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave.
50
51 Reset value: 0x0
52
53 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
54pub type ABRT_10ADDR1_NOACK_R = crate::BitReader<ABRT_10ADDR1_NOACK_A>;
55#[doc = "This field indicates that the Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave.
56
57 Reset value: 0x0
58
59 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver
60
61Value on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq, Eq)]
63pub enum ABRT_10ADDR1_NOACK_A {
64 #[doc = "0: This abort is not generated"]
65 INACTIVE = 0,
66 #[doc = "1: Byte 1 of 10Bit Address not ACKed by any slave"]
67 ACTIVE = 1,
68}
69impl From<ABRT_10ADDR1_NOACK_A> for bool {
70 #[inline(always)]
71 fn from(variant: ABRT_10ADDR1_NOACK_A) -> Self {
72 variant as u8 != 0
73 }
74}
75impl ABRT_10ADDR1_NOACK_R {
76 #[doc = "Get enumerated values variant"]
77 #[inline(always)]
78 pub const fn variant(&self) -> ABRT_10ADDR1_NOACK_A {
79 match self.bits {
80 false => ABRT_10ADDR1_NOACK_A::INACTIVE,
81 true => ABRT_10ADDR1_NOACK_A::ACTIVE,
82 }
83 }
84 #[doc = "This abort is not generated"]
85 #[inline(always)]
86 pub fn is_inactive(&self) -> bool {
87 *self == ABRT_10ADDR1_NOACK_A::INACTIVE
88 }
89 #[doc = "Byte 1 of 10Bit Address not ACKed by any slave"]
90 #[inline(always)]
91 pub fn is_active(&self) -> bool {
92 *self == ABRT_10ADDR1_NOACK_A::ACTIVE
93 }
94}
95#[doc = "Field `ABRT_10ADDR2_NOACK` reader - This field indicates that the Master is in 10-bit address mode and that the second address byte of the 10-bit address was not acknowledged by any slave.
96
97 Reset value: 0x0
98
99 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
100pub type ABRT_10ADDR2_NOACK_R = crate::BitReader<ABRT_10ADDR2_NOACK_A>;
101#[doc = "This field indicates that the Master is in 10-bit address mode and that the second address byte of the 10-bit address was not acknowledged by any slave.
102
103 Reset value: 0x0
104
105 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver
106
107Value on reset: 0"]
108#[derive(Clone, Copy, Debug, PartialEq, Eq)]
109pub enum ABRT_10ADDR2_NOACK_A {
110 #[doc = "0: This abort is not generated"]
111 INACTIVE = 0,
112 #[doc = "1: Byte 2 of 10Bit Address not ACKed by any slave"]
113 ACTIVE = 1,
114}
115impl From<ABRT_10ADDR2_NOACK_A> for bool {
116 #[inline(always)]
117 fn from(variant: ABRT_10ADDR2_NOACK_A) -> Self {
118 variant as u8 != 0
119 }
120}
121impl ABRT_10ADDR2_NOACK_R {
122 #[doc = "Get enumerated values variant"]
123 #[inline(always)]
124 pub const fn variant(&self) -> ABRT_10ADDR2_NOACK_A {
125 match self.bits {
126 false => ABRT_10ADDR2_NOACK_A::INACTIVE,
127 true => ABRT_10ADDR2_NOACK_A::ACTIVE,
128 }
129 }
130 #[doc = "This abort is not generated"]
131 #[inline(always)]
132 pub fn is_inactive(&self) -> bool {
133 *self == ABRT_10ADDR2_NOACK_A::INACTIVE
134 }
135 #[doc = "Byte 2 of 10Bit Address not ACKed by any slave"]
136 #[inline(always)]
137 pub fn is_active(&self) -> bool {
138 *self == ABRT_10ADDR2_NOACK_A::ACTIVE
139 }
140}
141#[doc = "Field `ABRT_TXDATA_NOACK` reader - This field indicates the master-mode only bit. When the master receives an acknowledgement for the address, but when it sends data byte(s) following the address, it did not receive an acknowledge from the remote slave(s).
142
143 Reset value: 0x0
144
145 Role of DW_apb_i2c: Master-Transmitter"]
146pub type ABRT_TXDATA_NOACK_R = crate::BitReader<ABRT_TXDATA_NOACK_A>;
147#[doc = "This field indicates the master-mode only bit. When the master receives an acknowledgement for the address, but when it sends data byte(s) following the address, it did not receive an acknowledge from the remote slave(s).
148
149 Reset value: 0x0
150
151 Role of DW_apb_i2c: Master-Transmitter
152
153Value on reset: 0"]
154#[derive(Clone, Copy, Debug, PartialEq, Eq)]
155pub enum ABRT_TXDATA_NOACK_A {
156 #[doc = "0: Transmitted data non-ACKed by addressed slave-scenario not present"]
157 ABRT_TXDATA_NOACK_VOID = 0,
158 #[doc = "1: Transmitted data not ACKed by addressed slave"]
159 ABRT_TXDATA_NOACK_GENERATED = 1,
160}
161impl From<ABRT_TXDATA_NOACK_A> for bool {
162 #[inline(always)]
163 fn from(variant: ABRT_TXDATA_NOACK_A) -> Self {
164 variant as u8 != 0
165 }
166}
167impl ABRT_TXDATA_NOACK_R {
168 #[doc = "Get enumerated values variant"]
169 #[inline(always)]
170 pub const fn variant(&self) -> ABRT_TXDATA_NOACK_A {
171 match self.bits {
172 false => ABRT_TXDATA_NOACK_A::ABRT_TXDATA_NOACK_VOID,
173 true => ABRT_TXDATA_NOACK_A::ABRT_TXDATA_NOACK_GENERATED,
174 }
175 }
176 #[doc = "Transmitted data non-ACKed by addressed slave-scenario not present"]
177 #[inline(always)]
178 pub fn is_abrt_txdata_noack_void(&self) -> bool {
179 *self == ABRT_TXDATA_NOACK_A::ABRT_TXDATA_NOACK_VOID
180 }
181 #[doc = "Transmitted data not ACKed by addressed slave"]
182 #[inline(always)]
183 pub fn is_abrt_txdata_noack_generated(&self) -> bool {
184 *self == ABRT_TXDATA_NOACK_A::ABRT_TXDATA_NOACK_GENERATED
185 }
186}
187#[doc = "Field `ABRT_GCALL_NOACK` reader - This field indicates that DW_apb_i2c in master mode has sent a General Call and no slave on the bus acknowledged the General Call.
188
189 Reset value: 0x0
190
191 Role of DW_apb_i2c: Master-Transmitter"]
192pub type ABRT_GCALL_NOACK_R = crate::BitReader<ABRT_GCALL_NOACK_A>;
193#[doc = "This field indicates that DW_apb_i2c in master mode has sent a General Call and no slave on the bus acknowledged the General Call.
194
195 Reset value: 0x0
196
197 Role of DW_apb_i2c: Master-Transmitter
198
199Value on reset: 0"]
200#[derive(Clone, Copy, Debug, PartialEq, Eq)]
201pub enum ABRT_GCALL_NOACK_A {
202 #[doc = "0: GCALL not ACKed by any slave-scenario not present"]
203 ABRT_GCALL_NOACK_VOID = 0,
204 #[doc = "1: GCALL not ACKed by any slave"]
205 ABRT_GCALL_NOACK_GENERATED = 1,
206}
207impl From<ABRT_GCALL_NOACK_A> for bool {
208 #[inline(always)]
209 fn from(variant: ABRT_GCALL_NOACK_A) -> Self {
210 variant as u8 != 0
211 }
212}
213impl ABRT_GCALL_NOACK_R {
214 #[doc = "Get enumerated values variant"]
215 #[inline(always)]
216 pub const fn variant(&self) -> ABRT_GCALL_NOACK_A {
217 match self.bits {
218 false => ABRT_GCALL_NOACK_A::ABRT_GCALL_NOACK_VOID,
219 true => ABRT_GCALL_NOACK_A::ABRT_GCALL_NOACK_GENERATED,
220 }
221 }
222 #[doc = "GCALL not ACKed by any slave-scenario not present"]
223 #[inline(always)]
224 pub fn is_abrt_gcall_noack_void(&self) -> bool {
225 *self == ABRT_GCALL_NOACK_A::ABRT_GCALL_NOACK_VOID
226 }
227 #[doc = "GCALL not ACKed by any slave"]
228 #[inline(always)]
229 pub fn is_abrt_gcall_noack_generated(&self) -> bool {
230 *self == ABRT_GCALL_NOACK_A::ABRT_GCALL_NOACK_GENERATED
231 }
232}
233#[doc = "Field `ABRT_GCALL_READ` reader - This field indicates that DW_apb_i2c in the master mode has sent a General Call but the user programmed the byte following the General Call to be a read from the bus (IC_DATA_CMD\\[9\\]
234is set to 1).
235
236 Reset value: 0x0
237
238 Role of DW_apb_i2c: Master-Transmitter"]
239pub type ABRT_GCALL_READ_R = crate::BitReader<ABRT_GCALL_READ_A>;
240#[doc = "This field indicates that DW_apb_i2c in the master mode has sent a General Call but the user programmed the byte following the General Call to be a read from the bus (IC_DATA_CMD\\[9\\]
241is set to 1).
242
243 Reset value: 0x0
244
245 Role of DW_apb_i2c: Master-Transmitter
246
247Value on reset: 0"]
248#[derive(Clone, Copy, Debug, PartialEq, Eq)]
249pub enum ABRT_GCALL_READ_A {
250 #[doc = "0: GCALL is followed by read from bus-scenario not present"]
251 ABRT_GCALL_READ_VOID = 0,
252 #[doc = "1: GCALL is followed by read from bus"]
253 ABRT_GCALL_READ_GENERATED = 1,
254}
255impl From<ABRT_GCALL_READ_A> for bool {
256 #[inline(always)]
257 fn from(variant: ABRT_GCALL_READ_A) -> Self {
258 variant as u8 != 0
259 }
260}
261impl ABRT_GCALL_READ_R {
262 #[doc = "Get enumerated values variant"]
263 #[inline(always)]
264 pub const fn variant(&self) -> ABRT_GCALL_READ_A {
265 match self.bits {
266 false => ABRT_GCALL_READ_A::ABRT_GCALL_READ_VOID,
267 true => ABRT_GCALL_READ_A::ABRT_GCALL_READ_GENERATED,
268 }
269 }
270 #[doc = "GCALL is followed by read from bus-scenario not present"]
271 #[inline(always)]
272 pub fn is_abrt_gcall_read_void(&self) -> bool {
273 *self == ABRT_GCALL_READ_A::ABRT_GCALL_READ_VOID
274 }
275 #[doc = "GCALL is followed by read from bus"]
276 #[inline(always)]
277 pub fn is_abrt_gcall_read_generated(&self) -> bool {
278 *self == ABRT_GCALL_READ_A::ABRT_GCALL_READ_GENERATED
279 }
280}
281#[doc = "Field `ABRT_HS_ACKDET` reader - This field indicates that the Master is in High Speed mode and the High Speed Master code was acknowledged (wrong behavior).
282
283 Reset value: 0x0
284
285 Role of DW_apb_i2c: Master"]
286pub type ABRT_HS_ACKDET_R = crate::BitReader<ABRT_HS_ACKDET_A>;
287#[doc = "This field indicates that the Master is in High Speed mode and the High Speed Master code was acknowledged (wrong behavior).
288
289 Reset value: 0x0
290
291 Role of DW_apb_i2c: Master
292
293Value on reset: 0"]
294#[derive(Clone, Copy, Debug, PartialEq, Eq)]
295pub enum ABRT_HS_ACKDET_A {
296 #[doc = "0: HS Master code ACKed in HS Mode- scenario not present"]
297 ABRT_HS_ACK_VOID = 0,
298 #[doc = "1: HS Master code ACKed in HS Mode"]
299 ABRT_HS_ACK_GENERATED = 1,
300}
301impl From<ABRT_HS_ACKDET_A> for bool {
302 #[inline(always)]
303 fn from(variant: ABRT_HS_ACKDET_A) -> Self {
304 variant as u8 != 0
305 }
306}
307impl ABRT_HS_ACKDET_R {
308 #[doc = "Get enumerated values variant"]
309 #[inline(always)]
310 pub const fn variant(&self) -> ABRT_HS_ACKDET_A {
311 match self.bits {
312 false => ABRT_HS_ACKDET_A::ABRT_HS_ACK_VOID,
313 true => ABRT_HS_ACKDET_A::ABRT_HS_ACK_GENERATED,
314 }
315 }
316 #[doc = "HS Master code ACKed in HS Mode- scenario not present"]
317 #[inline(always)]
318 pub fn is_abrt_hs_ack_void(&self) -> bool {
319 *self == ABRT_HS_ACKDET_A::ABRT_HS_ACK_VOID
320 }
321 #[doc = "HS Master code ACKed in HS Mode"]
322 #[inline(always)]
323 pub fn is_abrt_hs_ack_generated(&self) -> bool {
324 *self == ABRT_HS_ACKDET_A::ABRT_HS_ACK_GENERATED
325 }
326}
327#[doc = "Field `ABRT_SBYTE_ACKDET` reader - This field indicates that the Master has sent a START Byte and the START Byte was acknowledged (wrong behavior).
328
329 Reset value: 0x0
330
331 Role of DW_apb_i2c: Master"]
332pub type ABRT_SBYTE_ACKDET_R = crate::BitReader<ABRT_SBYTE_ACKDET_A>;
333#[doc = "This field indicates that the Master has sent a START Byte and the START Byte was acknowledged (wrong behavior).
334
335 Reset value: 0x0
336
337 Role of DW_apb_i2c: Master
338
339Value on reset: 0"]
340#[derive(Clone, Copy, Debug, PartialEq, Eq)]
341pub enum ABRT_SBYTE_ACKDET_A {
342 #[doc = "0: ACK detected for START byte- scenario not present"]
343 ABRT_SBYTE_ACKDET_VOID = 0,
344 #[doc = "1: ACK detected for START byte"]
345 ABRT_SBYTE_ACKDET_GENERATED = 1,
346}
347impl From<ABRT_SBYTE_ACKDET_A> for bool {
348 #[inline(always)]
349 fn from(variant: ABRT_SBYTE_ACKDET_A) -> Self {
350 variant as u8 != 0
351 }
352}
353impl ABRT_SBYTE_ACKDET_R {
354 #[doc = "Get enumerated values variant"]
355 #[inline(always)]
356 pub const fn variant(&self) -> ABRT_SBYTE_ACKDET_A {
357 match self.bits {
358 false => ABRT_SBYTE_ACKDET_A::ABRT_SBYTE_ACKDET_VOID,
359 true => ABRT_SBYTE_ACKDET_A::ABRT_SBYTE_ACKDET_GENERATED,
360 }
361 }
362 #[doc = "ACK detected for START byte- scenario not present"]
363 #[inline(always)]
364 pub fn is_abrt_sbyte_ackdet_void(&self) -> bool {
365 *self == ABRT_SBYTE_ACKDET_A::ABRT_SBYTE_ACKDET_VOID
366 }
367 #[doc = "ACK detected for START byte"]
368 #[inline(always)]
369 pub fn is_abrt_sbyte_ackdet_generated(&self) -> bool {
370 *self == ABRT_SBYTE_ACKDET_A::ABRT_SBYTE_ACKDET_GENERATED
371 }
372}
373#[doc = "Field `ABRT_HS_NORSTRT` reader - This field indicates that the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the user is trying to use the master to transfer data in High Speed mode.
374
375 Reset value: 0x0
376
377 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
378pub type ABRT_HS_NORSTRT_R = crate::BitReader<ABRT_HS_NORSTRT_A>;
379#[doc = "This field indicates that the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the user is trying to use the master to transfer data in High Speed mode.
380
381 Reset value: 0x0
382
383 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver
384
385Value on reset: 0"]
386#[derive(Clone, Copy, Debug, PartialEq, Eq)]
387pub enum ABRT_HS_NORSTRT_A {
388 #[doc = "0: User trying to switch Master to HS mode when RESTART disabled- scenario not present"]
389 ABRT_HS_NORSTRT_VOID = 0,
390 #[doc = "1: User trying to switch Master to HS mode when RESTART disabled"]
391 ABRT_HS_NORSTRT_GENERATED = 1,
392}
393impl From<ABRT_HS_NORSTRT_A> for bool {
394 #[inline(always)]
395 fn from(variant: ABRT_HS_NORSTRT_A) -> Self {
396 variant as u8 != 0
397 }
398}
399impl ABRT_HS_NORSTRT_R {
400 #[doc = "Get enumerated values variant"]
401 #[inline(always)]
402 pub const fn variant(&self) -> ABRT_HS_NORSTRT_A {
403 match self.bits {
404 false => ABRT_HS_NORSTRT_A::ABRT_HS_NORSTRT_VOID,
405 true => ABRT_HS_NORSTRT_A::ABRT_HS_NORSTRT_GENERATED,
406 }
407 }
408 #[doc = "User trying to switch Master to HS mode when RESTART disabled- scenario not present"]
409 #[inline(always)]
410 pub fn is_abrt_hs_norstrt_void(&self) -> bool {
411 *self == ABRT_HS_NORSTRT_A::ABRT_HS_NORSTRT_VOID
412 }
413 #[doc = "User trying to switch Master to HS mode when RESTART disabled"]
414 #[inline(always)]
415 pub fn is_abrt_hs_norstrt_generated(&self) -> bool {
416 *self == ABRT_HS_NORSTRT_A::ABRT_HS_NORSTRT_GENERATED
417 }
418}
419#[doc = "Field `ABRT_SBYTE_NORSTRT` reader - To clear Bit 9, the source of the ABRT_SBYTE_NORSTRT must be fixed first; restart must be enabled (IC_CON\\[5\\]=1), the SPECIAL bit must be cleared (IC_TAR\\[11\\]), or the GC_OR_START bit must be cleared (IC_TAR\\[10\\]). Once the source of the ABRT_SBYTE_NORSTRT is fixed, then this bit can be cleared in the same manner as other bits in this register. If the source of the ABRT_SBYTE_NORSTRT is not fixed before attempting to clear this bit, bit 9 clears for one cycle and then gets reasserted. When this field is set to 1, the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the user is trying to send a START Byte.
420
421 Reset value: 0x0
422
423 Role of DW_apb_i2c: Master"]
424pub type ABRT_SBYTE_NORSTRT_R = crate::BitReader<ABRT_SBYTE_NORSTRT_A>;
425#[doc = "To clear Bit 9, the source of the ABRT_SBYTE_NORSTRT must be fixed first; restart must be enabled (IC_CON\\[5\\]=1), the SPECIAL bit must be cleared (IC_TAR\\[11\\]), or the GC_OR_START bit must be cleared (IC_TAR\\[10\\]). Once the source of the ABRT_SBYTE_NORSTRT is fixed, then this bit can be cleared in the same manner as other bits in this register. If the source of the ABRT_SBYTE_NORSTRT is not fixed before attempting to clear this bit, bit 9 clears for one cycle and then gets reasserted. When this field is set to 1, the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the user is trying to send a START Byte.
426
427 Reset value: 0x0
428
429 Role of DW_apb_i2c: Master
430
431Value on reset: 0"]
432#[derive(Clone, Copy, Debug, PartialEq, Eq)]
433pub enum ABRT_SBYTE_NORSTRT_A {
434 #[doc = "0: User trying to send START byte when RESTART disabled- scenario not present"]
435 ABRT_SBYTE_NORSTRT_VOID = 0,
436 #[doc = "1: User trying to send START byte when RESTART disabled"]
437 ABRT_SBYTE_NORSTRT_GENERATED = 1,
438}
439impl From<ABRT_SBYTE_NORSTRT_A> for bool {
440 #[inline(always)]
441 fn from(variant: ABRT_SBYTE_NORSTRT_A) -> Self {
442 variant as u8 != 0
443 }
444}
445impl ABRT_SBYTE_NORSTRT_R {
446 #[doc = "Get enumerated values variant"]
447 #[inline(always)]
448 pub const fn variant(&self) -> ABRT_SBYTE_NORSTRT_A {
449 match self.bits {
450 false => ABRT_SBYTE_NORSTRT_A::ABRT_SBYTE_NORSTRT_VOID,
451 true => ABRT_SBYTE_NORSTRT_A::ABRT_SBYTE_NORSTRT_GENERATED,
452 }
453 }
454 #[doc = "User trying to send START byte when RESTART disabled- scenario not present"]
455 #[inline(always)]
456 pub fn is_abrt_sbyte_norstrt_void(&self) -> bool {
457 *self == ABRT_SBYTE_NORSTRT_A::ABRT_SBYTE_NORSTRT_VOID
458 }
459 #[doc = "User trying to send START byte when RESTART disabled"]
460 #[inline(always)]
461 pub fn is_abrt_sbyte_norstrt_generated(&self) -> bool {
462 *self == ABRT_SBYTE_NORSTRT_A::ABRT_SBYTE_NORSTRT_GENERATED
463 }
464}
465#[doc = "Field `ABRT_10B_RD_NORSTRT` reader - This field indicates that the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the master sends a read command in 10-bit addressing mode.
466
467 Reset value: 0x0
468
469 Role of DW_apb_i2c: Master-Receiver"]
470pub type ABRT_10B_RD_NORSTRT_R = crate::BitReader<ABRT_10B_RD_NORSTRT_A>;
471#[doc = "This field indicates that the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the master sends a read command in 10-bit addressing mode.
472
473 Reset value: 0x0
474
475 Role of DW_apb_i2c: Master-Receiver
476
477Value on reset: 0"]
478#[derive(Clone, Copy, Debug, PartialEq, Eq)]
479pub enum ABRT_10B_RD_NORSTRT_A {
480 #[doc = "0: Master not trying to read in 10Bit addressing mode when RESTART disabled"]
481 ABRT_10B_RD_VOID = 0,
482 #[doc = "1: Master trying to read in 10Bit addressing mode when RESTART disabled"]
483 ABRT_10B_RD_GENERATED = 1,
484}
485impl From<ABRT_10B_RD_NORSTRT_A> for bool {
486 #[inline(always)]
487 fn from(variant: ABRT_10B_RD_NORSTRT_A) -> Self {
488 variant as u8 != 0
489 }
490}
491impl ABRT_10B_RD_NORSTRT_R {
492 #[doc = "Get enumerated values variant"]
493 #[inline(always)]
494 pub const fn variant(&self) -> ABRT_10B_RD_NORSTRT_A {
495 match self.bits {
496 false => ABRT_10B_RD_NORSTRT_A::ABRT_10B_RD_VOID,
497 true => ABRT_10B_RD_NORSTRT_A::ABRT_10B_RD_GENERATED,
498 }
499 }
500 #[doc = "Master not trying to read in 10Bit addressing mode when RESTART disabled"]
501 #[inline(always)]
502 pub fn is_abrt_10b_rd_void(&self) -> bool {
503 *self == ABRT_10B_RD_NORSTRT_A::ABRT_10B_RD_VOID
504 }
505 #[doc = "Master trying to read in 10Bit addressing mode when RESTART disabled"]
506 #[inline(always)]
507 pub fn is_abrt_10b_rd_generated(&self) -> bool {
508 *self == ABRT_10B_RD_NORSTRT_A::ABRT_10B_RD_GENERATED
509 }
510}
511#[doc = "Field `ABRT_MASTER_DIS` reader - This field indicates that the User tries to initiate a Master operation with the Master mode disabled.
512
513 Reset value: 0x0
514
515 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
516pub type ABRT_MASTER_DIS_R = crate::BitReader<ABRT_MASTER_DIS_A>;
517#[doc = "This field indicates that the User tries to initiate a Master operation with the Master mode disabled.
518
519 Reset value: 0x0
520
521 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver
522
523Value on reset: 0"]
524#[derive(Clone, Copy, Debug, PartialEq, Eq)]
525pub enum ABRT_MASTER_DIS_A {
526 #[doc = "0: User initiating master operation when MASTER disabled- scenario not present"]
527 ABRT_MASTER_DIS_VOID = 0,
528 #[doc = "1: User initiating master operation when MASTER disabled"]
529 ABRT_MASTER_DIS_GENERATED = 1,
530}
531impl From<ABRT_MASTER_DIS_A> for bool {
532 #[inline(always)]
533 fn from(variant: ABRT_MASTER_DIS_A) -> Self {
534 variant as u8 != 0
535 }
536}
537impl ABRT_MASTER_DIS_R {
538 #[doc = "Get enumerated values variant"]
539 #[inline(always)]
540 pub const fn variant(&self) -> ABRT_MASTER_DIS_A {
541 match self.bits {
542 false => ABRT_MASTER_DIS_A::ABRT_MASTER_DIS_VOID,
543 true => ABRT_MASTER_DIS_A::ABRT_MASTER_DIS_GENERATED,
544 }
545 }
546 #[doc = "User initiating master operation when MASTER disabled- scenario not present"]
547 #[inline(always)]
548 pub fn is_abrt_master_dis_void(&self) -> bool {
549 *self == ABRT_MASTER_DIS_A::ABRT_MASTER_DIS_VOID
550 }
551 #[doc = "User initiating master operation when MASTER disabled"]
552 #[inline(always)]
553 pub fn is_abrt_master_dis_generated(&self) -> bool {
554 *self == ABRT_MASTER_DIS_A::ABRT_MASTER_DIS_GENERATED
555 }
556}
557#[doc = "Field `ARB_LOST` reader - This field specifies that the Master has lost arbitration, or if IC_TX_ABRT_SOURCE\\[14\\]
558is also set, then the slave transmitter has lost arbitration.
559
560 Reset value: 0x0
561
562 Role of DW_apb_i2c: Master-Transmitter or Slave-Transmitter"]
563pub type ARB_LOST_R = crate::BitReader<ARB_LOST_A>;
564#[doc = "This field specifies that the Master has lost arbitration, or if IC_TX_ABRT_SOURCE\\[14\\]
565is also set, then the slave transmitter has lost arbitration.
566
567 Reset value: 0x0
568
569 Role of DW_apb_i2c: Master-Transmitter or Slave-Transmitter
570
571Value on reset: 0"]
572#[derive(Clone, Copy, Debug, PartialEq, Eq)]
573pub enum ARB_LOST_A {
574 #[doc = "0: Master or Slave-Transmitter lost arbitration- scenario not present"]
575 ABRT_LOST_VOID = 0,
576 #[doc = "1: Master or Slave-Transmitter lost arbitration"]
577 ABRT_LOST_GENERATED = 1,
578}
579impl From<ARB_LOST_A> for bool {
580 #[inline(always)]
581 fn from(variant: ARB_LOST_A) -> Self {
582 variant as u8 != 0
583 }
584}
585impl ARB_LOST_R {
586 #[doc = "Get enumerated values variant"]
587 #[inline(always)]
588 pub const fn variant(&self) -> ARB_LOST_A {
589 match self.bits {
590 false => ARB_LOST_A::ABRT_LOST_VOID,
591 true => ARB_LOST_A::ABRT_LOST_GENERATED,
592 }
593 }
594 #[doc = "Master or Slave-Transmitter lost arbitration- scenario not present"]
595 #[inline(always)]
596 pub fn is_abrt_lost_void(&self) -> bool {
597 *self == ARB_LOST_A::ABRT_LOST_VOID
598 }
599 #[doc = "Master or Slave-Transmitter lost arbitration"]
600 #[inline(always)]
601 pub fn is_abrt_lost_generated(&self) -> bool {
602 *self == ARB_LOST_A::ABRT_LOST_GENERATED
603 }
604}
605#[doc = "Field `ABRT_SLVFLUSH_TXFIFO` reader - This field specifies that the Slave has received a read command and some data exists in the TX FIFO, so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO.
606
607 Reset value: 0x0
608
609 Role of DW_apb_i2c: Slave-Transmitter"]
610pub type ABRT_SLVFLUSH_TXFIFO_R = crate::BitReader<ABRT_SLVFLUSH_TXFIFO_A>;
611#[doc = "This field specifies that the Slave has received a read command and some data exists in the TX FIFO, so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO.
612
613 Reset value: 0x0
614
615 Role of DW_apb_i2c: Slave-Transmitter
616
617Value on reset: 0"]
618#[derive(Clone, Copy, Debug, PartialEq, Eq)]
619pub enum ABRT_SLVFLUSH_TXFIFO_A {
620 #[doc = "0: Slave flushes existing data in TX-FIFO upon getting read command- scenario not present"]
621 ABRT_SLVFLUSH_TXFIFO_VOID = 0,
622 #[doc = "1: Slave flushes existing data in TX-FIFO upon getting read command"]
623 ABRT_SLVFLUSH_TXFIFO_GENERATED = 1,
624}
625impl From<ABRT_SLVFLUSH_TXFIFO_A> for bool {
626 #[inline(always)]
627 fn from(variant: ABRT_SLVFLUSH_TXFIFO_A) -> Self {
628 variant as u8 != 0
629 }
630}
631impl ABRT_SLVFLUSH_TXFIFO_R {
632 #[doc = "Get enumerated values variant"]
633 #[inline(always)]
634 pub const fn variant(&self) -> ABRT_SLVFLUSH_TXFIFO_A {
635 match self.bits {
636 false => ABRT_SLVFLUSH_TXFIFO_A::ABRT_SLVFLUSH_TXFIFO_VOID,
637 true => ABRT_SLVFLUSH_TXFIFO_A::ABRT_SLVFLUSH_TXFIFO_GENERATED,
638 }
639 }
640 #[doc = "Slave flushes existing data in TX-FIFO upon getting read command- scenario not present"]
641 #[inline(always)]
642 pub fn is_abrt_slvflush_txfifo_void(&self) -> bool {
643 *self == ABRT_SLVFLUSH_TXFIFO_A::ABRT_SLVFLUSH_TXFIFO_VOID
644 }
645 #[doc = "Slave flushes existing data in TX-FIFO upon getting read command"]
646 #[inline(always)]
647 pub fn is_abrt_slvflush_txfifo_generated(&self) -> bool {
648 *self == ABRT_SLVFLUSH_TXFIFO_A::ABRT_SLVFLUSH_TXFIFO_GENERATED
649 }
650}
651#[doc = "Field `ABRT_SLV_ARBLOST` reader - This field indicates that a Slave has lost the bus while transmitting data to a remote master. IC_TX_ABRT_SOURCE\\[12\\]
652is set at the same time. Note: Even though the slave never 'owns' the bus, something could go wrong on the bus. This is a fail safe check. For instance, during a data transmission at the low-to-high transition of SCL, if what is on the data bus is not what is supposed to be transmitted, then DW_apb_i2c no longer own the bus.
653
654 Reset value: 0x0
655
656 Role of DW_apb_i2c: Slave-Transmitter"]
657pub type ABRT_SLV_ARBLOST_R = crate::BitReader<ABRT_SLV_ARBLOST_A>;
658#[doc = "This field indicates that a Slave has lost the bus while transmitting data to a remote master. IC_TX_ABRT_SOURCE\\[12\\]
659is set at the same time. Note: Even though the slave never 'owns' the bus, something could go wrong on the bus. This is a fail safe check. For instance, during a data transmission at the low-to-high transition of SCL, if what is on the data bus is not what is supposed to be transmitted, then DW_apb_i2c no longer own the bus.
660
661 Reset value: 0x0
662
663 Role of DW_apb_i2c: Slave-Transmitter
664
665Value on reset: 0"]
666#[derive(Clone, Copy, Debug, PartialEq, Eq)]
667pub enum ABRT_SLV_ARBLOST_A {
668 #[doc = "0: Slave lost arbitration to remote master- scenario not present"]
669 ABRT_SLV_ARBLOST_VOID = 0,
670 #[doc = "1: Slave lost arbitration to remote master"]
671 ABRT_SLV_ARBLOST_GENERATED = 1,
672}
673impl From<ABRT_SLV_ARBLOST_A> for bool {
674 #[inline(always)]
675 fn from(variant: ABRT_SLV_ARBLOST_A) -> Self {
676 variant as u8 != 0
677 }
678}
679impl ABRT_SLV_ARBLOST_R {
680 #[doc = "Get enumerated values variant"]
681 #[inline(always)]
682 pub const fn variant(&self) -> ABRT_SLV_ARBLOST_A {
683 match self.bits {
684 false => ABRT_SLV_ARBLOST_A::ABRT_SLV_ARBLOST_VOID,
685 true => ABRT_SLV_ARBLOST_A::ABRT_SLV_ARBLOST_GENERATED,
686 }
687 }
688 #[doc = "Slave lost arbitration to remote master- scenario not present"]
689 #[inline(always)]
690 pub fn is_abrt_slv_arblost_void(&self) -> bool {
691 *self == ABRT_SLV_ARBLOST_A::ABRT_SLV_ARBLOST_VOID
692 }
693 #[doc = "Slave lost arbitration to remote master"]
694 #[inline(always)]
695 pub fn is_abrt_slv_arblost_generated(&self) -> bool {
696 *self == ABRT_SLV_ARBLOST_A::ABRT_SLV_ARBLOST_GENERATED
697 }
698}
699#[doc = "Field `ABRT_SLVRD_INTX` reader - 1: When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes a 1 in CMD (bit 8) of IC_DATA_CMD register.
700
701 Reset value: 0x0
702
703 Role of DW_apb_i2c: Slave-Transmitter"]
704pub type ABRT_SLVRD_INTX_R = crate::BitReader<ABRT_SLVRD_INTX_A>;
705#[doc = "1: When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes a 1 in CMD (bit 8) of IC_DATA_CMD register.
706
707 Reset value: 0x0
708
709 Role of DW_apb_i2c: Slave-Transmitter
710
711Value on reset: 0"]
712#[derive(Clone, Copy, Debug, PartialEq, Eq)]
713pub enum ABRT_SLVRD_INTX_A {
714 #[doc = "0: Slave trying to transmit to remote master in read mode- scenario not present"]
715 ABRT_SLVRD_INTX_VOID = 0,
716 #[doc = "1: Slave trying to transmit to remote master in read mode"]
717 ABRT_SLVRD_INTX_GENERATED = 1,
718}
719impl From<ABRT_SLVRD_INTX_A> for bool {
720 #[inline(always)]
721 fn from(variant: ABRT_SLVRD_INTX_A) -> Self {
722 variant as u8 != 0
723 }
724}
725impl ABRT_SLVRD_INTX_R {
726 #[doc = "Get enumerated values variant"]
727 #[inline(always)]
728 pub const fn variant(&self) -> ABRT_SLVRD_INTX_A {
729 match self.bits {
730 false => ABRT_SLVRD_INTX_A::ABRT_SLVRD_INTX_VOID,
731 true => ABRT_SLVRD_INTX_A::ABRT_SLVRD_INTX_GENERATED,
732 }
733 }
734 #[doc = "Slave trying to transmit to remote master in read mode- scenario not present"]
735 #[inline(always)]
736 pub fn is_abrt_slvrd_intx_void(&self) -> bool {
737 *self == ABRT_SLVRD_INTX_A::ABRT_SLVRD_INTX_VOID
738 }
739 #[doc = "Slave trying to transmit to remote master in read mode"]
740 #[inline(always)]
741 pub fn is_abrt_slvrd_intx_generated(&self) -> bool {
742 *self == ABRT_SLVRD_INTX_A::ABRT_SLVRD_INTX_GENERATED
743 }
744}
745#[doc = "Field `ABRT_USER_ABRT` reader - This is a master-mode-only bit. Master has detected the transfer abort (IC_ENABLE\\[1\\])
746
747 Reset value: 0x0
748
749 Role of DW_apb_i2c: Master-Transmitter"]
750pub type ABRT_USER_ABRT_R = crate::BitReader<ABRT_USER_ABRT_A>;
751#[doc = "This is a master-mode-only bit. Master has detected the transfer abort (IC_ENABLE\\[1\\])
752
753 Reset value: 0x0
754
755 Role of DW_apb_i2c: Master-Transmitter
756
757Value on reset: 0"]
758#[derive(Clone, Copy, Debug, PartialEq, Eq)]
759pub enum ABRT_USER_ABRT_A {
760 #[doc = "0: Transfer abort detected by master- scenario not present"]
761 ABRT_USER_ABRT_VOID = 0,
762 #[doc = "1: Transfer abort detected by master"]
763 ABRT_USER_ABRT_GENERATED = 1,
764}
765impl From<ABRT_USER_ABRT_A> for bool {
766 #[inline(always)]
767 fn from(variant: ABRT_USER_ABRT_A) -> Self {
768 variant as u8 != 0
769 }
770}
771impl ABRT_USER_ABRT_R {
772 #[doc = "Get enumerated values variant"]
773 #[inline(always)]
774 pub const fn variant(&self) -> ABRT_USER_ABRT_A {
775 match self.bits {
776 false => ABRT_USER_ABRT_A::ABRT_USER_ABRT_VOID,
777 true => ABRT_USER_ABRT_A::ABRT_USER_ABRT_GENERATED,
778 }
779 }
780 #[doc = "Transfer abort detected by master- scenario not present"]
781 #[inline(always)]
782 pub fn is_abrt_user_abrt_void(&self) -> bool {
783 *self == ABRT_USER_ABRT_A::ABRT_USER_ABRT_VOID
784 }
785 #[doc = "Transfer abort detected by master"]
786 #[inline(always)]
787 pub fn is_abrt_user_abrt_generated(&self) -> bool {
788 *self == ABRT_USER_ABRT_A::ABRT_USER_ABRT_GENERATED
789 }
790}
791#[doc = "Field `TX_FLUSH_CNT` reader - This field indicates the number of Tx FIFO Data Commands which are flushed due to TX_ABRT interrupt. It is cleared whenever I2C is disabled.
792
793 Reset value: 0x0
794
795 Role of DW_apb_i2c: Master-Transmitter or Slave-Transmitter"]
796pub type TX_FLUSH_CNT_R = crate::FieldReader<u16>;
797impl R {
798 #[doc = "Bit 0 - This field indicates that the Master is in 7-bit addressing mode and the address sent was not acknowledged by any slave.
799
800 Reset value: 0x0
801
802 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
803 #[inline(always)]
804 pub fn abrt_7b_addr_noack(&self) -> ABRT_7B_ADDR_NOACK_R {
805 ABRT_7B_ADDR_NOACK_R::new((self.bits & 1) != 0)
806 }
807 #[doc = "Bit 1 - This field indicates that the Master is in 10-bit address mode and the first 10-bit address byte was not acknowledged by any slave.
808
809 Reset value: 0x0
810
811 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
812 #[inline(always)]
813 pub fn abrt_10addr1_noack(&self) -> ABRT_10ADDR1_NOACK_R {
814 ABRT_10ADDR1_NOACK_R::new(((self.bits >> 1) & 1) != 0)
815 }
816 #[doc = "Bit 2 - This field indicates that the Master is in 10-bit address mode and that the second address byte of the 10-bit address was not acknowledged by any slave.
817
818 Reset value: 0x0
819
820 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
821 #[inline(always)]
822 pub fn abrt_10addr2_noack(&self) -> ABRT_10ADDR2_NOACK_R {
823 ABRT_10ADDR2_NOACK_R::new(((self.bits >> 2) & 1) != 0)
824 }
825 #[doc = "Bit 3 - This field indicates the master-mode only bit. When the master receives an acknowledgement for the address, but when it sends data byte(s) following the address, it did not receive an acknowledge from the remote slave(s).
826
827 Reset value: 0x0
828
829 Role of DW_apb_i2c: Master-Transmitter"]
830 #[inline(always)]
831 pub fn abrt_txdata_noack(&self) -> ABRT_TXDATA_NOACK_R {
832 ABRT_TXDATA_NOACK_R::new(((self.bits >> 3) & 1) != 0)
833 }
834 #[doc = "Bit 4 - This field indicates that DW_apb_i2c in master mode has sent a General Call and no slave on the bus acknowledged the General Call.
835
836 Reset value: 0x0
837
838 Role of DW_apb_i2c: Master-Transmitter"]
839 #[inline(always)]
840 pub fn abrt_gcall_noack(&self) -> ABRT_GCALL_NOACK_R {
841 ABRT_GCALL_NOACK_R::new(((self.bits >> 4) & 1) != 0)
842 }
843 #[doc = "Bit 5 - This field indicates that DW_apb_i2c in the master mode has sent a General Call but the user programmed the byte following the General Call to be a read from the bus (IC_DATA_CMD\\[9\\]
844is set to 1).
845
846 Reset value: 0x0
847
848 Role of DW_apb_i2c: Master-Transmitter"]
849 #[inline(always)]
850 pub fn abrt_gcall_read(&self) -> ABRT_GCALL_READ_R {
851 ABRT_GCALL_READ_R::new(((self.bits >> 5) & 1) != 0)
852 }
853 #[doc = "Bit 6 - This field indicates that the Master is in High Speed mode and the High Speed Master code was acknowledged (wrong behavior).
854
855 Reset value: 0x0
856
857 Role of DW_apb_i2c: Master"]
858 #[inline(always)]
859 pub fn abrt_hs_ackdet(&self) -> ABRT_HS_ACKDET_R {
860 ABRT_HS_ACKDET_R::new(((self.bits >> 6) & 1) != 0)
861 }
862 #[doc = "Bit 7 - This field indicates that the Master has sent a START Byte and the START Byte was acknowledged (wrong behavior).
863
864 Reset value: 0x0
865
866 Role of DW_apb_i2c: Master"]
867 #[inline(always)]
868 pub fn abrt_sbyte_ackdet(&self) -> ABRT_SBYTE_ACKDET_R {
869 ABRT_SBYTE_ACKDET_R::new(((self.bits >> 7) & 1) != 0)
870 }
871 #[doc = "Bit 8 - This field indicates that the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the user is trying to use the master to transfer data in High Speed mode.
872
873 Reset value: 0x0
874
875 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
876 #[inline(always)]
877 pub fn abrt_hs_norstrt(&self) -> ABRT_HS_NORSTRT_R {
878 ABRT_HS_NORSTRT_R::new(((self.bits >> 8) & 1) != 0)
879 }
880 #[doc = "Bit 9 - To clear Bit 9, the source of the ABRT_SBYTE_NORSTRT must be fixed first; restart must be enabled (IC_CON\\[5\\]=1), the SPECIAL bit must be cleared (IC_TAR\\[11\\]), or the GC_OR_START bit must be cleared (IC_TAR\\[10\\]). Once the source of the ABRT_SBYTE_NORSTRT is fixed, then this bit can be cleared in the same manner as other bits in this register. If the source of the ABRT_SBYTE_NORSTRT is not fixed before attempting to clear this bit, bit 9 clears for one cycle and then gets reasserted. When this field is set to 1, the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the user is trying to send a START Byte.
881
882 Reset value: 0x0
883
884 Role of DW_apb_i2c: Master"]
885 #[inline(always)]
886 pub fn abrt_sbyte_norstrt(&self) -> ABRT_SBYTE_NORSTRT_R {
887 ABRT_SBYTE_NORSTRT_R::new(((self.bits >> 9) & 1) != 0)
888 }
889 #[doc = "Bit 10 - This field indicates that the restart is disabled (IC_RESTART_EN bit (IC_CON\\[5\\]) =0) and the master sends a read command in 10-bit addressing mode.
890
891 Reset value: 0x0
892
893 Role of DW_apb_i2c: Master-Receiver"]
894 #[inline(always)]
895 pub fn abrt_10b_rd_norstrt(&self) -> ABRT_10B_RD_NORSTRT_R {
896 ABRT_10B_RD_NORSTRT_R::new(((self.bits >> 10) & 1) != 0)
897 }
898 #[doc = "Bit 11 - This field indicates that the User tries to initiate a Master operation with the Master mode disabled.
899
900 Reset value: 0x0
901
902 Role of DW_apb_i2c: Master-Transmitter or Master-Receiver"]
903 #[inline(always)]
904 pub fn abrt_master_dis(&self) -> ABRT_MASTER_DIS_R {
905 ABRT_MASTER_DIS_R::new(((self.bits >> 11) & 1) != 0)
906 }
907 #[doc = "Bit 12 - This field specifies that the Master has lost arbitration, or if IC_TX_ABRT_SOURCE\\[14\\]
908is also set, then the slave transmitter has lost arbitration.
909
910 Reset value: 0x0
911
912 Role of DW_apb_i2c: Master-Transmitter or Slave-Transmitter"]
913 #[inline(always)]
914 pub fn arb_lost(&self) -> ARB_LOST_R {
915 ARB_LOST_R::new(((self.bits >> 12) & 1) != 0)
916 }
917 #[doc = "Bit 13 - This field specifies that the Slave has received a read command and some data exists in the TX FIFO, so the slave issues a TX_ABRT interrupt to flush old data in TX FIFO.
918
919 Reset value: 0x0
920
921 Role of DW_apb_i2c: Slave-Transmitter"]
922 #[inline(always)]
923 pub fn abrt_slvflush_txfifo(&self) -> ABRT_SLVFLUSH_TXFIFO_R {
924 ABRT_SLVFLUSH_TXFIFO_R::new(((self.bits >> 13) & 1) != 0)
925 }
926 #[doc = "Bit 14 - This field indicates that a Slave has lost the bus while transmitting data to a remote master. IC_TX_ABRT_SOURCE\\[12\\]
927is set at the same time. Note: Even though the slave never 'owns' the bus, something could go wrong on the bus. This is a fail safe check. For instance, during a data transmission at the low-to-high transition of SCL, if what is on the data bus is not what is supposed to be transmitted, then DW_apb_i2c no longer own the bus.
928
929 Reset value: 0x0
930
931 Role of DW_apb_i2c: Slave-Transmitter"]
932 #[inline(always)]
933 pub fn abrt_slv_arblost(&self) -> ABRT_SLV_ARBLOST_R {
934 ABRT_SLV_ARBLOST_R::new(((self.bits >> 14) & 1) != 0)
935 }
936 #[doc = "Bit 15 - 1: When the processor side responds to a slave mode request for data to be transmitted to a remote master and user writes a 1 in CMD (bit 8) of IC_DATA_CMD register.
937
938 Reset value: 0x0
939
940 Role of DW_apb_i2c: Slave-Transmitter"]
941 #[inline(always)]
942 pub fn abrt_slvrd_intx(&self) -> ABRT_SLVRD_INTX_R {
943 ABRT_SLVRD_INTX_R::new(((self.bits >> 15) & 1) != 0)
944 }
945 #[doc = "Bit 16 - This is a master-mode-only bit. Master has detected the transfer abort (IC_ENABLE\\[1\\])
946
947 Reset value: 0x0
948
949 Role of DW_apb_i2c: Master-Transmitter"]
950 #[inline(always)]
951 pub fn abrt_user_abrt(&self) -> ABRT_USER_ABRT_R {
952 ABRT_USER_ABRT_R::new(((self.bits >> 16) & 1) != 0)
953 }
954 #[doc = "Bits 23:31 - This field indicates the number of Tx FIFO Data Commands which are flushed due to TX_ABRT interrupt. It is cleared whenever I2C is disabled.
955
956 Reset value: 0x0
957
958 Role of DW_apb_i2c: Master-Transmitter or Slave-Transmitter"]
959 #[inline(always)]
960 pub fn tx_flush_cnt(&self) -> TX_FLUSH_CNT_R {
961 TX_FLUSH_CNT_R::new(((self.bits >> 23) & 0x01ff) as u16)
962 }
963}
964#[doc = "I2C Transmit Abort Source Register
965
966 This register has 32 bits that indicate the source of the TX_ABRT bit. Except for Bit 9, this register is cleared whenever the IC_CLR_TX_ABRT register or the IC_CLR_INTR register is read. To clear Bit 9, the source of the ABRT_SBYTE_NORSTRT must be fixed first; RESTART must be enabled (IC_CON\\[5\\]=1), the SPECIAL bit must be cleared (IC_TAR\\[11\\]), or the GC_OR_START bit must be cleared (IC_TAR\\[10\\]).
967
968 Once the source of the ABRT_SBYTE_NORSTRT is fixed, then this bit can be cleared in the same manner as other bits in this register. If the source of the ABRT_SBYTE_NORSTRT is not fixed before attempting to clear this bit, Bit 9 clears for one cycle and is then re-asserted.
969
970You can [`read`](crate::generic::Reg::read) this register and get [`ic_tx_abrt_source::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
971pub struct IC_TX_ABRT_SOURCE_SPEC;
972impl crate::RegisterSpec for IC_TX_ABRT_SOURCE_SPEC {
973 type Ux = u32;
974}
975#[doc = "`read()` method returns [`ic_tx_abrt_source::R`](R) reader structure"]
976impl crate::Readable for IC_TX_ABRT_SOURCE_SPEC {}
977#[doc = "`reset()` method sets IC_TX_ABRT_SOURCE to value 0"]
978impl crate::Resettable for IC_TX_ABRT_SOURCE_SPEC {
979 const RESET_VALUE: u32 = 0;
980}