rtic_monotonics/
lib.rs

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1//! In-tree implementations of the [`rtic_time::Monotonic`] (reexported) trait for
2//! timers & clocks found on commonly used microcontrollers.
3//!
4//! If you are using a microcontroller where CAS operations are not available natively, you might
5//! have to enable the `critical-section` or `unsafe-assume-single-core` feature of the
6//! [`portable-atomic`](https://docs.rs/portable-atomic/latest/portable_atomic/) dependency
7//! yourself for this dependency to compile.
8//!
9//! To enable the implementations, you must enable a feature for the specific MCU you're targeting.
10//!
11//! # Cortex-M Systick
12//! The `systick` monotonic works on all cortex-M parts, and requires that the feature `cortex-m-systick` is enabled.
13//!
14//! # RP2040
15//! The RP2040 monotonics require that the `rp2040` feature is enabled.
16//!
17//! # i.MX RT
18//! The i.MX RT monotonics require that the feature `imxrt_gpt1` or `imxrt_gpt2` is enabled.
19//!
20//! # nRF
21//! nRF monotonics require that one of the available `nrf52*` features is enabled.
22//!
23//! All implementations of timers for the nRF52 family are documented here. Monotonics that
24//! are not available on all parts in this family will have an `Available on crate features X only`
25//! tag, describing what parts _do_ support that monotonic. Monotonics without an
26//! `Available on crate features X only` tag are available on any `nrf52*` feature.
27//!
28//! # ATSAMD
29//! Monotonics for the ATSAMD family of parts using the real time clock (RTC) are provided in the
30//! [`atsamd-hal`](https://docs.rs/atsamd-hal/latest/atsamd_hal/rtc/rtic/index.html)
31//! crate with the `rtic` feature enabled.
32//!
33//! # Priority of interrupt handlers
34//!
35//! The priority of timer interrupts are based on `RTIC_ASYNC_MAX_LOGICAL_PRIO` generated by RTIC.
36//! It is calculated to be 1 less than the maximum hardware task priority (to not have impact on
37//! hardware tasks), or, if no hardware task is available, is set to the maximum priority in the
38//! system.
39
40// To build these docs correctly:
41// RUSTFLAGS="--cfg docsrs" cargo +nightly doc --features thumbv7-backend,cortex-m-systick,rp2040,nrf52840,imxrt_gpt1,imxrt_gpt2,imxrt-ral/imxrt1011,stm32h725ag,stm32_tim2,stm32_tim3,stm32_tim4,stm32_tim5,stm32_tim15
42
43#![no_std]
44#![deny(missing_docs)]
45#![allow(incomplete_features)]
46#![cfg_attr(docsrs, feature(doc_cfg))]
47
48pub use fugit;
49pub use rtic_time::{
50    self, monotonic::TimerQueueBasedMonotonic, timer_queue::TimerQueueBackend, Monotonic,
51    TimeoutError,
52};
53
54#[cfg(feature = "esp32c3-systimer")]
55pub mod esp32c3;
56
57#[cfg(feature = "cortex-m-systick")]
58pub mod systick;
59
60#[cfg(feature = "rp2040")]
61pub mod rp2040;
62
63#[cfg(feature = "rp235x")]
64pub mod rp235x;
65
66#[cfg(feature = "imxrt")]
67pub mod imxrt;
68
69#[cfg(any(
70    feature = "nrf52805",
71    feature = "nrf52810",
72    feature = "nrf52811",
73    feature = "nrf52832",
74    feature = "nrf52833",
75    feature = "nrf52840",
76    feature = "nrf5340-app",
77    feature = "nrf5340-net",
78    feature = "nrf9160",
79))]
80pub mod nrf;
81
82// Notice that `stm32` is not a feature, it is a compilation flag set in build.rs.
83#[cfg(stm32)]
84pub mod stm32;
85
86#[allow(dead_code)]
87pub(crate) const fn cortex_logical2hw(logical: u8, nvic_prio_bits: u8) -> u8 {
88    ((1 << nvic_prio_bits) - logical) << (8 - nvic_prio_bits)
89}
90
91#[cfg(any(
92    feature = "rp235x",
93    feature = "rp2040",
94    feature = "nrf52805",
95    feature = "nrf52810",
96    feature = "nrf52811",
97    feature = "nrf52832",
98    feature = "nrf52833",
99    feature = "nrf52840",
100    feature = "nrf5340-app",
101    feature = "nrf5340-net",
102    feature = "nrf9160",
103    feature = "imxrt",
104    stm32,
105))]
106pub(crate) unsafe fn set_monotonic_prio(
107    prio_bits: u8,
108    interrupt: impl cortex_m::interrupt::InterruptNumber,
109) {
110    extern "C" {
111        static RTIC_ASYNC_MAX_LOGICAL_PRIO: u8;
112    }
113
114    let max_prio = RTIC_ASYNC_MAX_LOGICAL_PRIO.max(1).min(1 << prio_bits);
115
116    let hw_prio = crate::cortex_logical2hw(max_prio, prio_bits);
117
118    // We take ownership of the entire IRQ and all settings to it, we only change settings
119    // for the IRQ we control.
120    // This will also compile-error in case the NVIC changes in size.
121    let mut nvic: cortex_m::peripheral::NVIC = core::mem::transmute(());
122
123    nvic.set_priority(interrupt, hw_prio);
124}
rtic_monotonics/lib.rs

rtic_monotonics/
lib.rs
