rp2040_pac/pwm/
inte.rs
1#[doc = "Register `INTE` reader"]
2pub type R = crate::R<INTE_SPEC>;
3#[doc = "Register `INTE` writer"]
4pub type W = crate::W<INTE_SPEC>;
5#[doc = "Field `CH0` reader - "]
6pub type CH0_R = crate::BitReader;
7#[doc = "Field `CH0` writer - "]
8pub type CH0_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CH1` reader - "]
10pub type CH1_R = crate::BitReader;
11#[doc = "Field `CH1` writer - "]
12pub type CH1_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CH2` reader - "]
14pub type CH2_R = crate::BitReader;
15#[doc = "Field `CH2` writer - "]
16pub type CH2_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CH3` reader - "]
18pub type CH3_R = crate::BitReader;
19#[doc = "Field `CH3` writer - "]
20pub type CH3_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `CH4` reader - "]
22pub type CH4_R = crate::BitReader;
23#[doc = "Field `CH4` writer - "]
24pub type CH4_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CH5` reader - "]
26pub type CH5_R = crate::BitReader;
27#[doc = "Field `CH5` writer - "]
28pub type CH5_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `CH6` reader - "]
30pub type CH6_R = crate::BitReader;
31#[doc = "Field `CH6` writer - "]
32pub type CH6_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `CH7` reader - "]
34pub type CH7_R = crate::BitReader;
35#[doc = "Field `CH7` writer - "]
36pub type CH7_W<'a, REG> = crate::BitWriter<'a, REG>;
37impl R {
38 #[doc = "Bit 0"]
39 #[inline(always)]
40 pub fn ch0(&self) -> CH0_R {
41 CH0_R::new((self.bits & 1) != 0)
42 }
43 #[doc = "Bit 1"]
44 #[inline(always)]
45 pub fn ch1(&self) -> CH1_R {
46 CH1_R::new(((self.bits >> 1) & 1) != 0)
47 }
48 #[doc = "Bit 2"]
49 #[inline(always)]
50 pub fn ch2(&self) -> CH2_R {
51 CH2_R::new(((self.bits >> 2) & 1) != 0)
52 }
53 #[doc = "Bit 3"]
54 #[inline(always)]
55 pub fn ch3(&self) -> CH3_R {
56 CH3_R::new(((self.bits >> 3) & 1) != 0)
57 }
58 #[doc = "Bit 4"]
59 #[inline(always)]
60 pub fn ch4(&self) -> CH4_R {
61 CH4_R::new(((self.bits >> 4) & 1) != 0)
62 }
63 #[doc = "Bit 5"]
64 #[inline(always)]
65 pub fn ch5(&self) -> CH5_R {
66 CH5_R::new(((self.bits >> 5) & 1) != 0)
67 }
68 #[doc = "Bit 6"]
69 #[inline(always)]
70 pub fn ch6(&self) -> CH6_R {
71 CH6_R::new(((self.bits >> 6) & 1) != 0)
72 }
73 #[doc = "Bit 7"]
74 #[inline(always)]
75 pub fn ch7(&self) -> CH7_R {
76 CH7_R::new(((self.bits >> 7) & 1) != 0)
77 }
78}
79impl W {
80 #[doc = "Bit 0"]
81 #[inline(always)]
82 #[must_use]
83 pub fn ch0(&mut self) -> CH0_W<INTE_SPEC> {
84 CH0_W::new(self, 0)
85 }
86 #[doc = "Bit 1"]
87 #[inline(always)]
88 #[must_use]
89 pub fn ch1(&mut self) -> CH1_W<INTE_SPEC> {
90 CH1_W::new(self, 1)
91 }
92 #[doc = "Bit 2"]
93 #[inline(always)]
94 #[must_use]
95 pub fn ch2(&mut self) -> CH2_W<INTE_SPEC> {
96 CH2_W::new(self, 2)
97 }
98 #[doc = "Bit 3"]
99 #[inline(always)]
100 #[must_use]
101 pub fn ch3(&mut self) -> CH3_W<INTE_SPEC> {
102 CH3_W::new(self, 3)
103 }
104 #[doc = "Bit 4"]
105 #[inline(always)]
106 #[must_use]
107 pub fn ch4(&mut self) -> CH4_W<INTE_SPEC> {
108 CH4_W::new(self, 4)
109 }
110 #[doc = "Bit 5"]
111 #[inline(always)]
112 #[must_use]
113 pub fn ch5(&mut self) -> CH5_W<INTE_SPEC> {
114 CH5_W::new(self, 5)
115 }
116 #[doc = "Bit 6"]
117 #[inline(always)]
118 #[must_use]
119 pub fn ch6(&mut self) -> CH6_W<INTE_SPEC> {
120 CH6_W::new(self, 6)
121 }
122 #[doc = "Bit 7"]
123 #[inline(always)]
124 #[must_use]
125 pub fn ch7(&mut self) -> CH7_W<INTE_SPEC> {
126 CH7_W::new(self, 7)
127 }
128 #[doc = r" Writes raw bits to the register."]
129 #[doc = r""]
130 #[doc = r" # Safety"]
131 #[doc = r""]
132 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
133 #[inline(always)]
134 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
135 self.bits = bits;
136 self
137 }
138}
139#[doc = "Interrupt Enable
140
141You can [`read`](crate::generic::Reg::read) this register and get [`inte::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
142pub struct INTE_SPEC;
143impl crate::RegisterSpec for INTE_SPEC {
144 type Ux = u32;
145}
146#[doc = "`read()` method returns [`inte::R`](R) reader structure"]
147impl crate::Readable for INTE_SPEC {}
148#[doc = "`write(|w| ..)` method takes [`inte::W`](W) writer structure"]
149impl crate::Writable for INTE_SPEC {
150 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
151 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
152}
153#[doc = "`reset()` method sets INTE to value 0"]
154impl crate::Resettable for INTE_SPEC {
155 const RESET_VALUE: u32 = 0;
156}