rp2040_pac/i2c0/
ic_tx_tl.rs

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1#[doc = "Register `IC_TX_TL` reader"]
2pub type R = crate::R<IC_TX_TL_SPEC>;
3#[doc = "Register `IC_TX_TL` writer"]
4pub type W = crate::W<IC_TX_TL_SPEC>;
5#[doc = "Field `TX_TL` reader - Transmit FIFO Threshold Level.  
6
7 Controls the level of entries (or below) that trigger the TX_EMPTY interrupt (bit 4 in IC_RAW_INTR_STAT register). The valid range is 0-255, with the additional restriction that it may not be set to value larger than the depth of the buffer. If an attempt is made to do that, the actual value set will be the maximum depth of the buffer. A value of 0 sets the threshold for 0 entries, and a value of 255 sets the threshold for 255 entries."]
8pub type TX_TL_R = crate::FieldReader;
9#[doc = "Field `TX_TL` writer - Transmit FIFO Threshold Level.  
10
11 Controls the level of entries (or below) that trigger the TX_EMPTY interrupt (bit 4 in IC_RAW_INTR_STAT register). The valid range is 0-255, with the additional restriction that it may not be set to value larger than the depth of the buffer. If an attempt is made to do that, the actual value set will be the maximum depth of the buffer. A value of 0 sets the threshold for 0 entries, and a value of 255 sets the threshold for 255 entries."]
12pub type TX_TL_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13impl R {
14    #[doc = "Bits 0:7 - Transmit FIFO Threshold Level.  
15
16 Controls the level of entries (or below) that trigger the TX_EMPTY interrupt (bit 4 in IC_RAW_INTR_STAT register). The valid range is 0-255, with the additional restriction that it may not be set to value larger than the depth of the buffer. If an attempt is made to do that, the actual value set will be the maximum depth of the buffer. A value of 0 sets the threshold for 0 entries, and a value of 255 sets the threshold for 255 entries."]
17    #[inline(always)]
18    pub fn tx_tl(&self) -> TX_TL_R {
19        TX_TL_R::new((self.bits & 0xff) as u8)
20    }
21}
22impl W {
23    #[doc = "Bits 0:7 - Transmit FIFO Threshold Level.  
24
25 Controls the level of entries (or below) that trigger the TX_EMPTY interrupt (bit 4 in IC_RAW_INTR_STAT register). The valid range is 0-255, with the additional restriction that it may not be set to value larger than the depth of the buffer. If an attempt is made to do that, the actual value set will be the maximum depth of the buffer. A value of 0 sets the threshold for 0 entries, and a value of 255 sets the threshold for 255 entries."]
26    #[inline(always)]
27    #[must_use]
28    pub fn tx_tl(&mut self) -> TX_TL_W<IC_TX_TL_SPEC> {
29        TX_TL_W::new(self, 0)
30    }
31    #[doc = r" Writes raw bits to the register."]
32    #[doc = r""]
33    #[doc = r" # Safety"]
34    #[doc = r""]
35    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
36    #[inline(always)]
37    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
38        self.bits = bits;
39        self
40    }
41}
42#[doc = "I2C Transmit FIFO Threshold Register  
43
44You can [`read`](crate::generic::Reg::read) this register and get [`ic_tx_tl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ic_tx_tl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
45pub struct IC_TX_TL_SPEC;
46impl crate::RegisterSpec for IC_TX_TL_SPEC {
47    type Ux = u32;
48}
49#[doc = "`read()` method returns [`ic_tx_tl::R`](R) reader structure"]
50impl crate::Readable for IC_TX_TL_SPEC {}
51#[doc = "`write(|w| ..)` method takes [`ic_tx_tl::W`](W) writer structure"]
52impl crate::Writable for IC_TX_TL_SPEC {
53    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
54    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
55}
56#[doc = "`reset()` method sets IC_TX_TL to value 0"]
57impl crate::Resettable for IC_TX_TL_SPEC {
58    const RESET_VALUE: u32 = 0;
59}
rp2040_pac/i2c0/ic_tx_tl.rs

rp2040_pac/i2c0/
ic_tx_tl.rs
