rp2040_pac/dma/
sniff_ctrl.rs

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1#[doc = "Register `SNIFF_CTRL` reader"]
2pub type R = crate::R<SNIFF_CTRL_SPEC>;
3#[doc = "Register `SNIFF_CTRL` writer"]
4pub type W = crate::W<SNIFF_CTRL_SPEC>;
5#[doc = "Field `EN` reader - Enable sniffer"]
6pub type EN_R = crate::BitReader;
7#[doc = "Field `EN` writer - Enable sniffer"]
8pub type EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DMACH` reader - DMA channel for Sniffer to observe"]
10pub type DMACH_R = crate::FieldReader;
11#[doc = "Field `DMACH` writer - DMA channel for Sniffer to observe"]
12pub type DMACH_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
13#[doc = "Field `CALC` reader - "]
14pub type CALC_R = crate::FieldReader<CALC_A>;
15#[doc = "  
16
17Value on reset: 0"]
18#[derive(Clone, Copy, Debug, PartialEq, Eq)]
19#[repr(u8)]
20pub enum CALC_A {
21    #[doc = "0: Calculate a CRC-32 (IEEE802.3 polynomial)"]
22    CRC32 = 0,
23    #[doc = "1: Calculate a CRC-32 (IEEE802.3 polynomial) with bit reversed data"]
24    CRC32R = 1,
25    #[doc = "2: Calculate a CRC-16-CCITT"]
26    CRC16 = 2,
27    #[doc = "3: Calculate a CRC-16-CCITT with bit reversed data"]
28    CRC16R = 3,
29    #[doc = "14: XOR reduction over all data. == 1 if the total 1 population count is odd."]
30    EVEN = 14,
31    #[doc = "15: Calculate a simple 32-bit checksum (addition with a 32 bit accumulator)"]
32    SUM = 15,
33}
34impl From<CALC_A> for u8 {
35    #[inline(always)]
36    fn from(variant: CALC_A) -> Self {
37        variant as _
38    }
39}
40impl crate::FieldSpec for CALC_A {
41    type Ux = u8;
42}
43impl CALC_R {
44    #[doc = "Get enumerated values variant"]
45    #[inline(always)]
46    pub const fn variant(&self) -> Option<CALC_A> {
47        match self.bits {
48            0 => Some(CALC_A::CRC32),
49            1 => Some(CALC_A::CRC32R),
50            2 => Some(CALC_A::CRC16),
51            3 => Some(CALC_A::CRC16R),
52            14 => Some(CALC_A::EVEN),
53            15 => Some(CALC_A::SUM),
54            _ => None,
55        }
56    }
57    #[doc = "Calculate a CRC-32 (IEEE802.3 polynomial)"]
58    #[inline(always)]
59    pub fn is_crc32(&self) -> bool {
60        *self == CALC_A::CRC32
61    }
62    #[doc = "Calculate a CRC-32 (IEEE802.3 polynomial) with bit reversed data"]
63    #[inline(always)]
64    pub fn is_crc32r(&self) -> bool {
65        *self == CALC_A::CRC32R
66    }
67    #[doc = "Calculate a CRC-16-CCITT"]
68    #[inline(always)]
69    pub fn is_crc16(&self) -> bool {
70        *self == CALC_A::CRC16
71    }
72    #[doc = "Calculate a CRC-16-CCITT with bit reversed data"]
73    #[inline(always)]
74    pub fn is_crc16r(&self) -> bool {
75        *self == CALC_A::CRC16R
76    }
77    #[doc = "XOR reduction over all data. == 1 if the total 1 population count is odd."]
78    #[inline(always)]
79    pub fn is_even(&self) -> bool {
80        *self == CALC_A::EVEN
81    }
82    #[doc = "Calculate a simple 32-bit checksum (addition with a 32 bit accumulator)"]
83    #[inline(always)]
84    pub fn is_sum(&self) -> bool {
85        *self == CALC_A::SUM
86    }
87}
88#[doc = "Field `CALC` writer - "]
89pub type CALC_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CALC_A>;
90impl<'a, REG> CALC_W<'a, REG>
91where
92    REG: crate::Writable + crate::RegisterSpec,
93    REG::Ux: From<u8>,
94{
95    #[doc = "Calculate a CRC-32 (IEEE802.3 polynomial)"]
96    #[inline(always)]
97    pub fn crc32(self) -> &'a mut crate::W<REG> {
98        self.variant(CALC_A::CRC32)
99    }
100    #[doc = "Calculate a CRC-32 (IEEE802.3 polynomial) with bit reversed data"]
101    #[inline(always)]
102    pub fn crc32r(self) -> &'a mut crate::W<REG> {
103        self.variant(CALC_A::CRC32R)
104    }
105    #[doc = "Calculate a CRC-16-CCITT"]
106    #[inline(always)]
107    pub fn crc16(self) -> &'a mut crate::W<REG> {
108        self.variant(CALC_A::CRC16)
109    }
110    #[doc = "Calculate a CRC-16-CCITT with bit reversed data"]
111    #[inline(always)]
112    pub fn crc16r(self) -> &'a mut crate::W<REG> {
113        self.variant(CALC_A::CRC16R)
114    }
115    #[doc = "XOR reduction over all data. == 1 if the total 1 population count is odd."]
116    #[inline(always)]
117    pub fn even(self) -> &'a mut crate::W<REG> {
118        self.variant(CALC_A::EVEN)
119    }
120    #[doc = "Calculate a simple 32-bit checksum (addition with a 32 bit accumulator)"]
121    #[inline(always)]
122    pub fn sum(self) -> &'a mut crate::W<REG> {
123        self.variant(CALC_A::SUM)
124    }
125}
126#[doc = "Field `BSWAP` reader - Locally perform a byte reverse on the sniffed data, before feeding into checksum.  
127
128 Note that the sniff hardware is downstream of the DMA channel byteswap performed in the read master: if channel CTRL_BSWAP and SNIFF_CTRL_BSWAP are both enabled, their effects cancel from the sniffer's point of view."]
129pub type BSWAP_R = crate::BitReader;
130#[doc = "Field `BSWAP` writer - Locally perform a byte reverse on the sniffed data, before feeding into checksum.  
131
132 Note that the sniff hardware is downstream of the DMA channel byteswap performed in the read master: if channel CTRL_BSWAP and SNIFF_CTRL_BSWAP are both enabled, their effects cancel from the sniffer's point of view."]
133pub type BSWAP_W<'a, REG> = crate::BitWriter<'a, REG>;
134#[doc = "Field `OUT_REV` reader - If set, the result appears bit-reversed when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus."]
135pub type OUT_REV_R = crate::BitReader;
136#[doc = "Field `OUT_REV` writer - If set, the result appears bit-reversed when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus."]
137pub type OUT_REV_W<'a, REG> = crate::BitWriter<'a, REG>;
138#[doc = "Field `OUT_INV` reader - If set, the result appears inverted (bitwise complement) when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus."]
139pub type OUT_INV_R = crate::BitReader;
140#[doc = "Field `OUT_INV` writer - If set, the result appears inverted (bitwise complement) when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus."]
141pub type OUT_INV_W<'a, REG> = crate::BitWriter<'a, REG>;
142impl R {
143    #[doc = "Bit 0 - Enable sniffer"]
144    #[inline(always)]
145    pub fn en(&self) -> EN_R {
146        EN_R::new((self.bits & 1) != 0)
147    }
148    #[doc = "Bits 1:4 - DMA channel for Sniffer to observe"]
149    #[inline(always)]
150    pub fn dmach(&self) -> DMACH_R {
151        DMACH_R::new(((self.bits >> 1) & 0x0f) as u8)
152    }
153    #[doc = "Bits 5:8"]
154    #[inline(always)]
155    pub fn calc(&self) -> CALC_R {
156        CALC_R::new(((self.bits >> 5) & 0x0f) as u8)
157    }
158    #[doc = "Bit 9 - Locally perform a byte reverse on the sniffed data, before feeding into checksum.  
159
160 Note that the sniff hardware is downstream of the DMA channel byteswap performed in the read master: if channel CTRL_BSWAP and SNIFF_CTRL_BSWAP are both enabled, their effects cancel from the sniffer's point of view."]
161    #[inline(always)]
162    pub fn bswap(&self) -> BSWAP_R {
163        BSWAP_R::new(((self.bits >> 9) & 1) != 0)
164    }
165    #[doc = "Bit 10 - If set, the result appears bit-reversed when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus."]
166    #[inline(always)]
167    pub fn out_rev(&self) -> OUT_REV_R {
168        OUT_REV_R::new(((self.bits >> 10) & 1) != 0)
169    }
170    #[doc = "Bit 11 - If set, the result appears inverted (bitwise complement) when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus."]
171    #[inline(always)]
172    pub fn out_inv(&self) -> OUT_INV_R {
173        OUT_INV_R::new(((self.bits >> 11) & 1) != 0)
174    }
175}
176impl W {
177    #[doc = "Bit 0 - Enable sniffer"]
178    #[inline(always)]
179    #[must_use]
180    pub fn en(&mut self) -> EN_W<SNIFF_CTRL_SPEC> {
181        EN_W::new(self, 0)
182    }
183    #[doc = "Bits 1:4 - DMA channel for Sniffer to observe"]
184    #[inline(always)]
185    #[must_use]
186    pub fn dmach(&mut self) -> DMACH_W<SNIFF_CTRL_SPEC> {
187        DMACH_W::new(self, 1)
188    }
189    #[doc = "Bits 5:8"]
190    #[inline(always)]
191    #[must_use]
192    pub fn calc(&mut self) -> CALC_W<SNIFF_CTRL_SPEC> {
193        CALC_W::new(self, 5)
194    }
195    #[doc = "Bit 9 - Locally perform a byte reverse on the sniffed data, before feeding into checksum.  
196
197 Note that the sniff hardware is downstream of the DMA channel byteswap performed in the read master: if channel CTRL_BSWAP and SNIFF_CTRL_BSWAP are both enabled, their effects cancel from the sniffer's point of view."]
198    #[inline(always)]
199    #[must_use]
200    pub fn bswap(&mut self) -> BSWAP_W<SNIFF_CTRL_SPEC> {
201        BSWAP_W::new(self, 9)
202    }
203    #[doc = "Bit 10 - If set, the result appears bit-reversed when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus."]
204    #[inline(always)]
205    #[must_use]
206    pub fn out_rev(&mut self) -> OUT_REV_W<SNIFF_CTRL_SPEC> {
207        OUT_REV_W::new(self, 10)
208    }
209    #[doc = "Bit 11 - If set, the result appears inverted (bitwise complement) when read. This does not affect the way the checksum is calculated; the result is transformed on-the-fly between the result register and the bus."]
210    #[inline(always)]
211    #[must_use]
212    pub fn out_inv(&mut self) -> OUT_INV_W<SNIFF_CTRL_SPEC> {
213        OUT_INV_W::new(self, 11)
214    }
215    #[doc = r" Writes raw bits to the register."]
216    #[doc = r""]
217    #[doc = r" # Safety"]
218    #[doc = r""]
219    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
220    #[inline(always)]
221    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
222        self.bits = bits;
223        self
224    }
225}
226#[doc = "Sniffer Control  
227
228You can [`read`](crate::generic::Reg::read) this register and get [`sniff_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sniff_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
229pub struct SNIFF_CTRL_SPEC;
230impl crate::RegisterSpec for SNIFF_CTRL_SPEC {
231    type Ux = u32;
232}
233#[doc = "`read()` method returns [`sniff_ctrl::R`](R) reader structure"]
234impl crate::Readable for SNIFF_CTRL_SPEC {}
235#[doc = "`write(|w| ..)` method takes [`sniff_ctrl::W`](W) writer structure"]
236impl crate::Writable for SNIFF_CTRL_SPEC {
237    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
238    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
239}
240#[doc = "`reset()` method sets SNIFF_CTRL to value 0"]
241impl crate::Resettable for SNIFF_CTRL_SPEC {
242    const RESET_VALUE: u32 = 0;
243}
rp2040_pac/dma/sniff_ctrl.rs

rp2040_pac/dma/
sniff_ctrl.rs
