nrf52840_pac/qspi/
ifconfig1.rs

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1#[doc = "Register `IFCONFIG1` reader"]
2pub struct R(crate::R<IFCONFIG1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IFCONFIG1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IFCONFIG1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IFCONFIG1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IFCONFIG1` writer"]
17pub struct W(crate::W<IFCONFIG1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IFCONFIG1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IFCONFIG1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IFCONFIG1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SCKDELAY` reader - Minimum amount of time that the CSN pin must stay high before it can go low again. Value is specified in number of 16 MHz periods (62.5 ns)."]
38pub type SCKDELAY_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SCKDELAY` writer - Minimum amount of time that the CSN pin must stay high before it can go low again. Value is specified in number of 16 MHz periods (62.5 ns)."]
40pub type SCKDELAY_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IFCONFIG1_SPEC, u8, u8, 8, O>;
41#[doc = "Field `DPMEN` reader - Enter/exit deep power-down mode (DPM) for external flash memory."]
42pub type DPMEN_R = crate::BitReader<DPMEN_A>;
43#[doc = "Enter/exit deep power-down mode (DPM) for external flash memory.\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq)]
45pub enum DPMEN_A {
46    #[doc = "0: Exit DPM."]
47    EXIT = 0,
48    #[doc = "1: Enter DPM."]
49    ENTER = 1,
50}
51impl From<DPMEN_A> for bool {
52    #[inline(always)]
53    fn from(variant: DPMEN_A) -> Self {
54        variant as u8 != 0
55    }
56}
57impl DPMEN_R {
58    #[doc = "Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> DPMEN_A {
61        match self.bits {
62            false => DPMEN_A::EXIT,
63            true => DPMEN_A::ENTER,
64        }
65    }
66    #[doc = "Checks if the value of the field is `EXIT`"]
67    #[inline(always)]
68    pub fn is_exit(&self) -> bool {
69        *self == DPMEN_A::EXIT
70    }
71    #[doc = "Checks if the value of the field is `ENTER`"]
72    #[inline(always)]
73    pub fn is_enter(&self) -> bool {
74        *self == DPMEN_A::ENTER
75    }
76}
77#[doc = "Field `DPMEN` writer - Enter/exit deep power-down mode (DPM) for external flash memory."]
78pub type DPMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFCONFIG1_SPEC, DPMEN_A, O>;
79impl<'a, const O: u8> DPMEN_W<'a, O> {
80    #[doc = "Exit DPM."]
81    #[inline(always)]
82    pub fn exit(self) -> &'a mut W {
83        self.variant(DPMEN_A::EXIT)
84    }
85    #[doc = "Enter DPM."]
86    #[inline(always)]
87    pub fn enter(self) -> &'a mut W {
88        self.variant(DPMEN_A::ENTER)
89    }
90}
91#[doc = "Field `SPIMODE` reader - Select SPI mode."]
92pub type SPIMODE_R = crate::BitReader<SPIMODE_A>;
93#[doc = "Select SPI mode.\n\nValue on reset: 0"]
94#[derive(Clone, Copy, Debug, PartialEq)]
95pub enum SPIMODE_A {
96    #[doc = "0: Mode 0: Data are captured on the clock rising edge and data is output on a falling edge. Base level of clock is 0 (CPOL=0, CPHA=0)."]
97    MODE0 = 0,
98    #[doc = "1: Mode 3: Data are captured on the clock falling edge and data is output on a rising edge. Base level of clock is 1 (CPOL=1, CPHA=1)."]
99    MODE3 = 1,
100}
101impl From<SPIMODE_A> for bool {
102    #[inline(always)]
103    fn from(variant: SPIMODE_A) -> Self {
104        variant as u8 != 0
105    }
106}
107impl SPIMODE_R {
108    #[doc = "Get enumerated values variant"]
109    #[inline(always)]
110    pub fn variant(&self) -> SPIMODE_A {
111        match self.bits {
112            false => SPIMODE_A::MODE0,
113            true => SPIMODE_A::MODE3,
114        }
115    }
116    #[doc = "Checks if the value of the field is `MODE0`"]
117    #[inline(always)]
118    pub fn is_mode0(&self) -> bool {
119        *self == SPIMODE_A::MODE0
120    }
121    #[doc = "Checks if the value of the field is `MODE3`"]
122    #[inline(always)]
123    pub fn is_mode3(&self) -> bool {
124        *self == SPIMODE_A::MODE3
125    }
126}
127#[doc = "Field `SPIMODE` writer - Select SPI mode."]
128pub type SPIMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFCONFIG1_SPEC, SPIMODE_A, O>;
129impl<'a, const O: u8> SPIMODE_W<'a, O> {
130    #[doc = "Mode 0: Data are captured on the clock rising edge and data is output on a falling edge. Base level of clock is 0 (CPOL=0, CPHA=0)."]
131    #[inline(always)]
132    pub fn mode0(self) -> &'a mut W {
133        self.variant(SPIMODE_A::MODE0)
134    }
135    #[doc = "Mode 3: Data are captured on the clock falling edge and data is output on a rising edge. Base level of clock is 1 (CPOL=1, CPHA=1)."]
136    #[inline(always)]
137    pub fn mode3(self) -> &'a mut W {
138        self.variant(SPIMODE_A::MODE3)
139    }
140}
141#[doc = "Field `SCKFREQ` reader - SCK frequency is given as 32 MHz / (SCKFREQ + 1)."]
142pub type SCKFREQ_R = crate::FieldReader<u8, u8>;
143#[doc = "Field `SCKFREQ` writer - SCK frequency is given as 32 MHz / (SCKFREQ + 1)."]
144pub type SCKFREQ_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IFCONFIG1_SPEC, u8, u8, 4, O>;
145impl R {
146    #[doc = "Bits 0:7 - Minimum amount of time that the CSN pin must stay high before it can go low again. Value is specified in number of 16 MHz periods (62.5 ns)."]
147    #[inline(always)]
148    pub fn sckdelay(&self) -> SCKDELAY_R {
149        SCKDELAY_R::new((self.bits & 0xff) as u8)
150    }
151    #[doc = "Bit 24 - Enter/exit deep power-down mode (DPM) for external flash memory."]
152    #[inline(always)]
153    pub fn dpmen(&self) -> DPMEN_R {
154        DPMEN_R::new(((self.bits >> 24) & 1) != 0)
155    }
156    #[doc = "Bit 25 - Select SPI mode."]
157    #[inline(always)]
158    pub fn spimode(&self) -> SPIMODE_R {
159        SPIMODE_R::new(((self.bits >> 25) & 1) != 0)
160    }
161    #[doc = "Bits 28:31 - SCK frequency is given as 32 MHz / (SCKFREQ + 1)."]
162    #[inline(always)]
163    pub fn sckfreq(&self) -> SCKFREQ_R {
164        SCKFREQ_R::new(((self.bits >> 28) & 0x0f) as u8)
165    }
166}
167impl W {
168    #[doc = "Bits 0:7 - Minimum amount of time that the CSN pin must stay high before it can go low again. Value is specified in number of 16 MHz periods (62.5 ns)."]
169    #[inline(always)]
170    pub fn sckdelay(&mut self) -> SCKDELAY_W<0> {
171        SCKDELAY_W::new(self)
172    }
173    #[doc = "Bit 24 - Enter/exit deep power-down mode (DPM) for external flash memory."]
174    #[inline(always)]
175    pub fn dpmen(&mut self) -> DPMEN_W<24> {
176        DPMEN_W::new(self)
177    }
178    #[doc = "Bit 25 - Select SPI mode."]
179    #[inline(always)]
180    pub fn spimode(&mut self) -> SPIMODE_W<25> {
181        SPIMODE_W::new(self)
182    }
183    #[doc = "Bits 28:31 - SCK frequency is given as 32 MHz / (SCKFREQ + 1)."]
184    #[inline(always)]
185    pub fn sckfreq(&mut self) -> SCKFREQ_W<28> {
186        SCKFREQ_W::new(self)
187    }
188    #[doc = "Writes raw bits to the register."]
189    #[inline(always)]
190    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
191        self.0.bits(bits);
192        self
193    }
194}
195#[doc = "Interface configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifconfig1](index.html) module"]
196pub struct IFCONFIG1_SPEC;
197impl crate::RegisterSpec for IFCONFIG1_SPEC {
198    type Ux = u32;
199}
200#[doc = "`read()` method returns [ifconfig1::R](R) reader structure"]
201impl crate::Readable for IFCONFIG1_SPEC {
202    type Reader = R;
203}
204#[doc = "`write(|w| ..)` method takes [ifconfig1::W](W) writer structure"]
205impl crate::Writable for IFCONFIG1_SPEC {
206    type Writer = W;
207}
208#[doc = "`reset()` method sets IFCONFIG1 to value 0x0004_0480"]
209impl crate::Resettable for IFCONFIG1_SPEC {
210    #[inline(always)]
211    fn reset_value() -> Self::Ux {
212        0x0004_0480
213    }
214}
nrf52840_pac/qspi/ifconfig1.rs

nrf52840_pac/qspi/
ifconfig1.rs
