rp2040_pac/
adc.rs

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1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    cs: CS,
5    result: RESULT,
6    fcs: FCS,
7    fifo: FIFO,
8    div: DIV,
9    intr: INTR,
10    inte: INTE,
11    intf: INTF,
12    ints: INTS,
13}
14impl RegisterBlock {
15    #[doc = "0x00 - ADC Control and Status"]
16    #[inline(always)]
17    pub const fn cs(&self) -> &CS {
18        &self.cs
19    }
20    #[doc = "0x04 - Result of most recent ADC conversion"]
21    #[inline(always)]
22    pub const fn result(&self) -> &RESULT {
23        &self.result
24    }
25    #[doc = "0x08 - FIFO control and status"]
26    #[inline(always)]
27    pub const fn fcs(&self) -> &FCS {
28        &self.fcs
29    }
30    #[doc = "0x0c - Conversion result FIFO"]
31    #[inline(always)]
32    pub const fn fifo(&self) -> &FIFO {
33        &self.fifo
34    }
35    #[doc = "0x10 - Clock divider. If non-zero, CS_START_MANY will start conversions  
36 at regular intervals rather than back-to-back.  
37 The divider is reset when either of these fields are written.  
38 Total period is 1 + INT + FRAC / 256"]
39    #[inline(always)]
40    pub const fn div(&self) -> &DIV {
41        &self.div
42    }
43    #[doc = "0x14 - Raw Interrupts"]
44    #[inline(always)]
45    pub const fn intr(&self) -> &INTR {
46        &self.intr
47    }
48    #[doc = "0x18 - Interrupt Enable"]
49    #[inline(always)]
50    pub const fn inte(&self) -> &INTE {
51        &self.inte
52    }
53    #[doc = "0x1c - Interrupt Force"]
54    #[inline(always)]
55    pub const fn intf(&self) -> &INTF {
56        &self.intf
57    }
58    #[doc = "0x20 - Interrupt status after masking &amp; forcing"]
59    #[inline(always)]
60    pub const fn ints(&self) -> &INTS {
61        &self.ints
62    }
63}
64#[doc = "CS (rw) register accessor: ADC Control and Status  
65
66You can [`read`](crate::generic::Reg::read) this register and get [`cs::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
67
68For information about available fields see [`mod@cs`]
69module"]
70pub type CS = crate::Reg<cs::CS_SPEC>;
71#[doc = "ADC Control and Status"]
72pub mod cs;
73#[doc = "RESULT (r) register accessor: Result of most recent ADC conversion  
74
75You can [`read`](crate::generic::Reg::read) this register and get [`result::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
76
77For information about available fields see [`mod@result`]
78module"]
79pub type RESULT = crate::Reg<result::RESULT_SPEC>;
80#[doc = "Result of most recent ADC conversion"]
81pub mod result;
82#[doc = "FCS (rw) register accessor: FIFO control and status  
83
84You can [`read`](crate::generic::Reg::read) this register and get [`fcs::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fcs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
85
86For information about available fields see [`mod@fcs`]
87module"]
88pub type FCS = crate::Reg<fcs::FCS_SPEC>;
89#[doc = "FIFO control and status"]
90pub mod fcs;
91#[doc = "FIFO (r) register accessor: Conversion result FIFO  
92
93You can [`read`](crate::generic::Reg::read) this register and get [`fifo::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
94
95For information about available fields see [`mod@fifo`]
96module"]
97pub type FIFO = crate::Reg<fifo::FIFO_SPEC>;
98#[doc = "Conversion result FIFO"]
99pub mod fifo;
100#[doc = "DIV (rw) register accessor: Clock divider. If non-zero, CS_START_MANY will start conversions  
101 at regular intervals rather than back-to-back.  
102 The divider is reset when either of these fields are written.  
103 Total period is 1 + INT + FRAC / 256  
104
105You can [`read`](crate::generic::Reg::read) this register and get [`div::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`div::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
106
107For information about available fields see [`mod@div`]
108module"]
109pub type DIV = crate::Reg<div::DIV_SPEC>;
110#[doc = "Clock divider. If non-zero, CS_START_MANY will start conversions  
111 at regular intervals rather than back-to-back.  
112 The divider is reset when either of these fields are written.  
113 Total period is 1 + INT + FRAC / 256"]
114pub mod div;
115#[doc = "INTR (r) register accessor: Raw Interrupts  
116
117You can [`read`](crate::generic::Reg::read) this register and get [`intr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
118
119For information about available fields see [`mod@intr`]
120module"]
121pub type INTR = crate::Reg<intr::INTR_SPEC>;
122#[doc = "Raw Interrupts"]
123pub mod intr;
124#[doc = "INTE (rw) register accessor: Interrupt Enable  
125
126You can [`read`](crate::generic::Reg::read) this register and get [`inte::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`inte::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
127
128For information about available fields see [`mod@inte`]
129module"]
130pub type INTE = crate::Reg<inte::INTE_SPEC>;
131#[doc = "Interrupt Enable"]
132pub mod inte;
133#[doc = "INTF (rw) register accessor: Interrupt Force  
134
135You can [`read`](crate::generic::Reg::read) this register and get [`intf::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`intf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
136
137For information about available fields see [`mod@intf`]
138module"]
139pub type INTF = crate::Reg<intf::INTF_SPEC>;
140#[doc = "Interrupt Force"]
141pub mod intf;
142#[doc = "INTS (r) register accessor: Interrupt status after masking &amp; forcing  
143
144You can [`read`](crate::generic::Reg::read) this register and get [`ints::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
145
146For information about available fields see [`mod@ints`]
147module"]
148pub type INTS = crate::Reg<ints::INTS_SPEC>;
149#[doc = "Interrupt status after masking &amp; forcing"]
150pub mod ints;
rp2040_pac/adc.rs

rp2040_pac/
adc.rs
