1#[doc = "Register `DBG_CFGINFO` reader"]
2pub type R = crate::R<DBG_CFGINFO_SPEC>;
3#[doc = "Field `FIFO_DEPTH` reader - The depth of the state machine TX/RX FIFOs, measured in words.
4 Joining fifos via SHIFTCTRL_FJOIN gives one FIFO with double
5 this depth."]
6pub type FIFO_DEPTH_R = crate::FieldReader;
7#[doc = "Field `SM_COUNT` reader - The number of state machines this PIO instance is equipped with."]
8pub type SM_COUNT_R = crate::FieldReader;
9#[doc = "Field `IMEM_SIZE` reader - The size of the instruction memory, measured in units of one instruction"]
10pub type IMEM_SIZE_R = crate::FieldReader;
11impl R {
12#[doc = "Bits 0:5 - The depth of the state machine TX/RX FIFOs, measured in words.
13 Joining fifos via SHIFTCTRL_FJOIN gives one FIFO with double
14 this depth."]
15 #[inline(always)]
16pub fn fifo_depth(&self) -> FIFO_DEPTH_R {
17 FIFO_DEPTH_R::new((self.bits & 0x3f) as u8)
18 }
19#[doc = "Bits 8:11 - The number of state machines this PIO instance is equipped with."]
20 #[inline(always)]
21pub fn sm_count(&self) -> SM_COUNT_R {
22 SM_COUNT_R::new(((self.bits >> 8) & 0x0f) as u8)
23 }
24#[doc = "Bits 16:21 - The size of the instruction memory, measured in units of one instruction"]
25 #[inline(always)]
26pub fn imem_size(&self) -> IMEM_SIZE_R {
27 IMEM_SIZE_R::new(((self.bits >> 16) & 0x3f) as u8)
28 }
29}
30#[doc = "The PIO hardware has some free parameters that may vary between chip products.
31 These should be provided in the chip datasheet, but are also exposed here.
3233You can [`read`](crate::generic::Reg::read) this register and get [`dbg_cfginfo::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
34pub struct DBG_CFGINFO_SPEC;
35impl crate::RegisterSpec for DBG_CFGINFO_SPEC {
36type Ux = u32;
37}
38#[doc = "`read()` method returns [`dbg_cfginfo::R`](R) reader structure"]
39impl crate::Readable for DBG_CFGINFO_SPEC {}
40#[doc = "`reset()` method sets DBG_CFGINFO to value 0"]
41impl crate::Resettable for DBG_CFGINFO_SPEC {
42const RESET_VALUE: u32 = 0;
43}