rp2040_pac/i2c0/
ic_status.rs

1#[doc = "Register `IC_STATUS` reader"]
2pub type R = crate::R<IC_STATUS_SPEC>;
3#[doc = "Field `ACTIVITY` reader - I2C Activity Status. Reset value: 0x0"]
4pub type ACTIVITY_R = crate::BitReader<ACTIVITY_A>;
5#[doc = "I2C Activity Status. Reset value: 0x0  
6
7Value on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum ACTIVITY_A {
10    #[doc = "0: I2C is idle"]
11    INACTIVE = 0,
12    #[doc = "1: I2C is active"]
13    ACTIVE = 1,
14}
15impl From<ACTIVITY_A> for bool {
16    #[inline(always)]
17    fn from(variant: ACTIVITY_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl ACTIVITY_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> ACTIVITY_A {
25        match self.bits {
26            false => ACTIVITY_A::INACTIVE,
27            true => ACTIVITY_A::ACTIVE,
28        }
29    }
30    #[doc = "I2C is idle"]
31    #[inline(always)]
32    pub fn is_inactive(&self) -> bool {
33        *self == ACTIVITY_A::INACTIVE
34    }
35    #[doc = "I2C is active"]
36    #[inline(always)]
37    pub fn is_active(&self) -> bool {
38        *self == ACTIVITY_A::ACTIVE
39    }
40}
41#[doc = "Field `TFNF` reader - Transmit FIFO Not Full. Set when the transmit FIFO contains one or more empty locations, and is cleared when the FIFO is full. - 0: Transmit FIFO is full - 1: Transmit FIFO is not full Reset value: 0x1"]
42pub type TFNF_R = crate::BitReader<TFNF_A>;
43#[doc = "Transmit FIFO Not Full. Set when the transmit FIFO contains one or more empty locations, and is cleared when the FIFO is full. - 0: Transmit FIFO is full - 1: Transmit FIFO is not full Reset value: 0x1  
44
45Value on reset: 1"]
46#[derive(Clone, Copy, Debug, PartialEq, Eq)]
47pub enum TFNF_A {
48    #[doc = "0: Tx FIFO is full"]
49    FULL = 0,
50    #[doc = "1: Tx FIFO not full"]
51    NOT_FULL = 1,
52}
53impl From<TFNF_A> for bool {
54    #[inline(always)]
55    fn from(variant: TFNF_A) -> Self {
56        variant as u8 != 0
57    }
58}
59impl TFNF_R {
60    #[doc = "Get enumerated values variant"]
61    #[inline(always)]
62    pub const fn variant(&self) -> TFNF_A {
63        match self.bits {
64            false => TFNF_A::FULL,
65            true => TFNF_A::NOT_FULL,
66        }
67    }
68    #[doc = "Tx FIFO is full"]
69    #[inline(always)]
70    pub fn is_full(&self) -> bool {
71        *self == TFNF_A::FULL
72    }
73    #[doc = "Tx FIFO not full"]
74    #[inline(always)]
75    pub fn is_not_full(&self) -> bool {
76        *self == TFNF_A::NOT_FULL
77    }
78}
79#[doc = "Field `TFE` reader - Transmit FIFO Completely Empty. When the transmit FIFO is completely empty, this bit is set. When it contains one or more valid entries, this bit is cleared. This bit field does not request an interrupt. - 0: Transmit FIFO is not empty - 1: Transmit FIFO is empty Reset value: 0x1"]
80pub type TFE_R = crate::BitReader<TFE_A>;
81#[doc = "Transmit FIFO Completely Empty. When the transmit FIFO is completely empty, this bit is set. When it contains one or more valid entries, this bit is cleared. This bit field does not request an interrupt. - 0: Transmit FIFO is not empty - 1: Transmit FIFO is empty Reset value: 0x1  
82
83Value on reset: 1"]
84#[derive(Clone, Copy, Debug, PartialEq, Eq)]
85pub enum TFE_A {
86    #[doc = "0: Tx FIFO not empty"]
87    NON_EMPTY = 0,
88    #[doc = "1: Tx FIFO is empty"]
89    EMPTY = 1,
90}
91impl From<TFE_A> for bool {
92    #[inline(always)]
93    fn from(variant: TFE_A) -> Self {
94        variant as u8 != 0
95    }
96}
97impl TFE_R {
98    #[doc = "Get enumerated values variant"]
99    #[inline(always)]
100    pub const fn variant(&self) -> TFE_A {
101        match self.bits {
102            false => TFE_A::NON_EMPTY,
103            true => TFE_A::EMPTY,
104        }
105    }
106    #[doc = "Tx FIFO not empty"]
107    #[inline(always)]
108    pub fn is_non_empty(&self) -> bool {
109        *self == TFE_A::NON_EMPTY
110    }
111    #[doc = "Tx FIFO is empty"]
112    #[inline(always)]
113    pub fn is_empty(&self) -> bool {
114        *self == TFE_A::EMPTY
115    }
116}
117#[doc = "Field `RFNE` reader - Receive FIFO Not Empty. This bit is set when the receive FIFO contains one or more entries; it is cleared when the receive FIFO is empty. - 0: Receive FIFO is empty - 1: Receive FIFO is not empty Reset value: 0x0"]
118pub type RFNE_R = crate::BitReader<RFNE_A>;
119#[doc = "Receive FIFO Not Empty. This bit is set when the receive FIFO contains one or more entries; it is cleared when the receive FIFO is empty. - 0: Receive FIFO is empty - 1: Receive FIFO is not empty Reset value: 0x0  
120
121Value on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq, Eq)]
123pub enum RFNE_A {
124    #[doc = "0: Rx FIFO is empty"]
125    EMPTY = 0,
126    #[doc = "1: Rx FIFO not empty"]
127    NOT_EMPTY = 1,
128}
129impl From<RFNE_A> for bool {
130    #[inline(always)]
131    fn from(variant: RFNE_A) -> Self {
132        variant as u8 != 0
133    }
134}
135impl RFNE_R {
136    #[doc = "Get enumerated values variant"]
137    #[inline(always)]
138    pub const fn variant(&self) -> RFNE_A {
139        match self.bits {
140            false => RFNE_A::EMPTY,
141            true => RFNE_A::NOT_EMPTY,
142        }
143    }
144    #[doc = "Rx FIFO is empty"]
145    #[inline(always)]
146    pub fn is_empty(&self) -> bool {
147        *self == RFNE_A::EMPTY
148    }
149    #[doc = "Rx FIFO not empty"]
150    #[inline(always)]
151    pub fn is_not_empty(&self) -> bool {
152        *self == RFNE_A::NOT_EMPTY
153    }
154}
155#[doc = "Field `RFF` reader - Receive FIFO Completely Full. When the receive FIFO is completely full, this bit is set. When the receive FIFO contains one or more empty location, this bit is cleared. - 0: Receive FIFO is not full - 1: Receive FIFO is full Reset value: 0x0"]
156pub type RFF_R = crate::BitReader<RFF_A>;
157#[doc = "Receive FIFO Completely Full. When the receive FIFO is completely full, this bit is set. When the receive FIFO contains one or more empty location, this bit is cleared. - 0: Receive FIFO is not full - 1: Receive FIFO is full Reset value: 0x0  
158
159Value on reset: 0"]
160#[derive(Clone, Copy, Debug, PartialEq, Eq)]
161pub enum RFF_A {
162    #[doc = "0: Rx FIFO not full"]
163    NOT_FULL = 0,
164    #[doc = "1: Rx FIFO is full"]
165    FULL = 1,
166}
167impl From<RFF_A> for bool {
168    #[inline(always)]
169    fn from(variant: RFF_A) -> Self {
170        variant as u8 != 0
171    }
172}
173impl RFF_R {
174    #[doc = "Get enumerated values variant"]
175    #[inline(always)]
176    pub const fn variant(&self) -> RFF_A {
177        match self.bits {
178            false => RFF_A::NOT_FULL,
179            true => RFF_A::FULL,
180        }
181    }
182    #[doc = "Rx FIFO not full"]
183    #[inline(always)]
184    pub fn is_not_full(&self) -> bool {
185        *self == RFF_A::NOT_FULL
186    }
187    #[doc = "Rx FIFO is full"]
188    #[inline(always)]
189    pub fn is_full(&self) -> bool {
190        *self == RFF_A::FULL
191    }
192}
193#[doc = "Field `MST_ACTIVITY` reader - Master FSM Activity Status. When the Master Finite State Machine (FSM) is not in the IDLE state, this bit is set. - 0: Master FSM is in IDLE state so the Master part of DW_apb_i2c is not Active - 1: Master FSM is not in IDLE state so the Master part of DW_apb_i2c is Active Note: IC_STATUS\\[0\\]-that is, ACTIVITY bit-is the OR of SLV_ACTIVITY and MST_ACTIVITY bits.  
194
195 Reset value: 0x0"]
196pub type MST_ACTIVITY_R = crate::BitReader<MST_ACTIVITY_A>;
197#[doc = "Master FSM Activity Status. When the Master Finite State Machine (FSM) is not in the IDLE state, this bit is set. - 0: Master FSM is in IDLE state so the Master part of DW_apb_i2c is not Active - 1: Master FSM is not in IDLE state so the Master part of DW_apb_i2c is Active Note: IC_STATUS\\[0\\]-that is, ACTIVITY bit-is the OR of SLV_ACTIVITY and MST_ACTIVITY bits.  
198
199 Reset value: 0x0  
200
201Value on reset: 0"]
202#[derive(Clone, Copy, Debug, PartialEq, Eq)]
203pub enum MST_ACTIVITY_A {
204    #[doc = "0: Master is idle"]
205    IDLE = 0,
206    #[doc = "1: Master not idle"]
207    ACTIVE = 1,
208}
209impl From<MST_ACTIVITY_A> for bool {
210    #[inline(always)]
211    fn from(variant: MST_ACTIVITY_A) -> Self {
212        variant as u8 != 0
213    }
214}
215impl MST_ACTIVITY_R {
216    #[doc = "Get enumerated values variant"]
217    #[inline(always)]
218    pub const fn variant(&self) -> MST_ACTIVITY_A {
219        match self.bits {
220            false => MST_ACTIVITY_A::IDLE,
221            true => MST_ACTIVITY_A::ACTIVE,
222        }
223    }
224    #[doc = "Master is idle"]
225    #[inline(always)]
226    pub fn is_idle(&self) -> bool {
227        *self == MST_ACTIVITY_A::IDLE
228    }
229    #[doc = "Master not idle"]
230    #[inline(always)]
231    pub fn is_active(&self) -> bool {
232        *self == MST_ACTIVITY_A::ACTIVE
233    }
234}
235#[doc = "Field `SLV_ACTIVITY` reader - Slave FSM Activity Status. When the Slave Finite State Machine (FSM) is not in the IDLE state, this bit is set. - 0: Slave FSM is in IDLE state so the Slave part of DW_apb_i2c is not Active - 1: Slave FSM is not in IDLE state so the Slave part of DW_apb_i2c is Active Reset value: 0x0"]
236pub type SLV_ACTIVITY_R = crate::BitReader<SLV_ACTIVITY_A>;
237#[doc = "Slave FSM Activity Status. When the Slave Finite State Machine (FSM) is not in the IDLE state, this bit is set. - 0: Slave FSM is in IDLE state so the Slave part of DW_apb_i2c is not Active - 1: Slave FSM is not in IDLE state so the Slave part of DW_apb_i2c is Active Reset value: 0x0  
238
239Value on reset: 0"]
240#[derive(Clone, Copy, Debug, PartialEq, Eq)]
241pub enum SLV_ACTIVITY_A {
242    #[doc = "0: Slave is idle"]
243    IDLE = 0,
244    #[doc = "1: Slave not idle"]
245    ACTIVE = 1,
246}
247impl From<SLV_ACTIVITY_A> for bool {
248    #[inline(always)]
249    fn from(variant: SLV_ACTIVITY_A) -> Self {
250        variant as u8 != 0
251    }
252}
253impl SLV_ACTIVITY_R {
254    #[doc = "Get enumerated values variant"]
255    #[inline(always)]
256    pub const fn variant(&self) -> SLV_ACTIVITY_A {
257        match self.bits {
258            false => SLV_ACTIVITY_A::IDLE,
259            true => SLV_ACTIVITY_A::ACTIVE,
260        }
261    }
262    #[doc = "Slave is idle"]
263    #[inline(always)]
264    pub fn is_idle(&self) -> bool {
265        *self == SLV_ACTIVITY_A::IDLE
266    }
267    #[doc = "Slave not idle"]
268    #[inline(always)]
269    pub fn is_active(&self) -> bool {
270        *self == SLV_ACTIVITY_A::ACTIVE
271    }
272}
273impl R {
274    #[doc = "Bit 0 - I2C Activity Status. Reset value: 0x0"]
275    #[inline(always)]
276    pub fn activity(&self) -> ACTIVITY_R {
277        ACTIVITY_R::new((self.bits & 1) != 0)
278    }
279    #[doc = "Bit 1 - Transmit FIFO Not Full. Set when the transmit FIFO contains one or more empty locations, and is cleared when the FIFO is full. - 0: Transmit FIFO is full - 1: Transmit FIFO is not full Reset value: 0x1"]
280    #[inline(always)]
281    pub fn tfnf(&self) -> TFNF_R {
282        TFNF_R::new(((self.bits >> 1) & 1) != 0)
283    }
284    #[doc = "Bit 2 - Transmit FIFO Completely Empty. When the transmit FIFO is completely empty, this bit is set. When it contains one or more valid entries, this bit is cleared. This bit field does not request an interrupt. - 0: Transmit FIFO is not empty - 1: Transmit FIFO is empty Reset value: 0x1"]
285    #[inline(always)]
286    pub fn tfe(&self) -> TFE_R {
287        TFE_R::new(((self.bits >> 2) & 1) != 0)
288    }
289    #[doc = "Bit 3 - Receive FIFO Not Empty. This bit is set when the receive FIFO contains one or more entries; it is cleared when the receive FIFO is empty. - 0: Receive FIFO is empty - 1: Receive FIFO is not empty Reset value: 0x0"]
290    #[inline(always)]
291    pub fn rfne(&self) -> RFNE_R {
292        RFNE_R::new(((self.bits >> 3) & 1) != 0)
293    }
294    #[doc = "Bit 4 - Receive FIFO Completely Full. When the receive FIFO is completely full, this bit is set. When the receive FIFO contains one or more empty location, this bit is cleared. - 0: Receive FIFO is not full - 1: Receive FIFO is full Reset value: 0x0"]
295    #[inline(always)]
296    pub fn rff(&self) -> RFF_R {
297        RFF_R::new(((self.bits >> 4) & 1) != 0)
298    }
299    #[doc = "Bit 5 - Master FSM Activity Status. When the Master Finite State Machine (FSM) is not in the IDLE state, this bit is set. - 0: Master FSM is in IDLE state so the Master part of DW_apb_i2c is not Active - 1: Master FSM is not in IDLE state so the Master part of DW_apb_i2c is Active Note: IC_STATUS\\[0\\]-that is, ACTIVITY bit-is the OR of SLV_ACTIVITY and MST_ACTIVITY bits.  
300
301 Reset value: 0x0"]
302    #[inline(always)]
303    pub fn mst_activity(&self) -> MST_ACTIVITY_R {
304        MST_ACTIVITY_R::new(((self.bits >> 5) & 1) != 0)
305    }
306    #[doc = "Bit 6 - Slave FSM Activity Status. When the Slave Finite State Machine (FSM) is not in the IDLE state, this bit is set. - 0: Slave FSM is in IDLE state so the Slave part of DW_apb_i2c is not Active - 1: Slave FSM is not in IDLE state so the Slave part of DW_apb_i2c is Active Reset value: 0x0"]
307    #[inline(always)]
308    pub fn slv_activity(&self) -> SLV_ACTIVITY_R {
309        SLV_ACTIVITY_R::new(((self.bits >> 6) & 1) != 0)
310    }
311}
312#[doc = "I2C Status Register  
313
314 This is a read-only register used to indicate the current transfer status and FIFO status. The status register may be read at any time. None of the bits in this register request an interrupt.  
315
316 When the I2C is disabled by writing 0 in bit 0 of the IC_ENABLE register: - Bits 1 and 2 are set to 1 - Bits 3 and 10 are set to 0 When the master or slave state machines goes to idle and ic_en=0: - Bits 5 and 6 are set to 0  
317
318You can [`read`](crate::generic::Reg::read) this register and get [`ic_status::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
319pub struct IC_STATUS_SPEC;
320impl crate::RegisterSpec for IC_STATUS_SPEC {
321    type Ux = u32;
322}
323#[doc = "`read()` method returns [`ic_status::R`](R) reader structure"]
324impl crate::Readable for IC_STATUS_SPEC {}
325#[doc = "`reset()` method sets IC_STATUS to value 0x06"]
326impl crate::Resettable for IC_STATUS_SPEC {
327    const RESET_VALUE: u32 = 0x06;
328}
rp2040_pac/i2c0/ic_status.rs

rp2040_pac/i2c0/
ic_status.rs
