rp2040_pac/adc/
intr.rs

1#[doc = "Register `INTR` reader"]
2pub type R = crate::R<INTR_SPEC>;
3#[doc = "Field `FIFO` reader - Triggered when the sample FIFO reaches a certain level.  
4 This level can be programmed via the FCS_THRESH field."]
5pub type FIFO_R = crate::BitReader;
6impl R {
7    #[doc = "Bit 0 - Triggered when the sample FIFO reaches a certain level.  
8 This level can be programmed via the FCS_THRESH field."]
9    #[inline(always)]
10    pub fn fifo(&self) -> FIFO_R {
11        FIFO_R::new((self.bits & 1) != 0)
12    }
13}
14#[doc = "Raw Interrupts  
15
16You can [`read`](crate::generic::Reg::read) this register and get [`intr::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
17pub struct INTR_SPEC;
18impl crate::RegisterSpec for INTR_SPEC {
19    type Ux = u32;
20}
21#[doc = "`read()` method returns [`intr::R`](R) reader structure"]
22impl crate::Readable for INTR_SPEC {}
23#[doc = "`reset()` method sets INTR to value 0"]
24impl crate::Resettable for INTR_SPEC {
25    const RESET_VALUE: u32 = 0;
26}