rp2040_pac/
rosc.rs

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1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    ctrl: CTRL,
5    freqa: FREQA,
6    freqb: FREQB,
7    dormant: DORMANT,
8    div: DIV,
9    phase: PHASE,
10    status: STATUS,
11    randombit: RANDOMBIT,
12}
13impl RegisterBlock {
14    #[doc = "0x00 - Ring Oscillator control"]
15    #[inline(always)]
16    pub const fn ctrl(&self) -> &CTRL {
17        &self.ctrl
18    }
19    #[doc = "0x04 - The FREQA &amp; FREQB registers control the frequency by controlling the drive strength of each stage  
20 The drive strength has 4 levels determined by the number of bits set  
21 Increasing the number of bits set increases the drive strength and increases the oscillation frequency  
22 0 bits set is the default drive strength  
23 1 bit set doubles the drive strength  
24 2 bits set triples drive strength  
25 3 bits set quadruples drive strength"]
26    #[inline(always)]
27    pub const fn freqa(&self) -> &FREQA {
28        &self.freqa
29    }
30    #[doc = "0x08 - For a detailed description see freqa register"]
31    #[inline(always)]
32    pub const fn freqb(&self) -> &FREQB {
33        &self.freqb
34    }
35    #[doc = "0x0c - Ring Oscillator pause control  
36 This is used to save power by pausing the ROSC  
37 On power-up this field is initialised to WAKE  
38 An invalid write will also select WAKE  
39 Warning: setup the irq before selecting dormant mode"]
40    #[inline(always)]
41    pub const fn dormant(&self) -> &DORMANT {
42        &self.dormant
43    }
44    #[doc = "0x10 - Controls the output divider"]
45    #[inline(always)]
46    pub const fn div(&self) -> &DIV {
47        &self.div
48    }
49    #[doc = "0x14 - Controls the phase shifted output"]
50    #[inline(always)]
51    pub const fn phase(&self) -> &PHASE {
52        &self.phase
53    }
54    #[doc = "0x18 - Ring Oscillator Status"]
55    #[inline(always)]
56    pub const fn status(&self) -> &STATUS {
57        &self.status
58    }
59    #[doc = "0x1c - This just reads the state of the oscillator output so randomness is compromised if the ring oscillator is stopped or run at a harmonic of the bus frequency"]
60    #[inline(always)]
61    pub const fn randombit(&self) -> &RANDOMBIT {
62        &self.randombit
63    }
64}
65#[doc = "CTRL (rw) register accessor: Ring Oscillator control  
66
67You can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
68
69For information about available fields see [`mod@ctrl`]
70module"]
71pub type CTRL = crate::Reg<ctrl::CTRL_SPEC>;
72#[doc = "Ring Oscillator control"]
73pub mod ctrl;
74#[doc = "FREQA (rw) register accessor: The FREQA &amp; FREQB registers control the frequency by controlling the drive strength of each stage  
75 The drive strength has 4 levels determined by the number of bits set  
76 Increasing the number of bits set increases the drive strength and increases the oscillation frequency  
77 0 bits set is the default drive strength  
78 1 bit set doubles the drive strength  
79 2 bits set triples drive strength  
80 3 bits set quadruples drive strength  
81
82You can [`read`](crate::generic::Reg::read) this register and get [`freqa::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`freqa::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
83
84For information about available fields see [`mod@freqa`]
85module"]
86pub type FREQA = crate::Reg<freqa::FREQA_SPEC>;
87#[doc = "The FREQA &amp; FREQB registers control the frequency by controlling the drive strength of each stage  
88 The drive strength has 4 levels determined by the number of bits set  
89 Increasing the number of bits set increases the drive strength and increases the oscillation frequency  
90 0 bits set is the default drive strength  
91 1 bit set doubles the drive strength  
92 2 bits set triples drive strength  
93 3 bits set quadruples drive strength"]
94pub mod freqa;
95#[doc = "FREQB (rw) register accessor: For a detailed description see freqa register  
96
97You can [`read`](crate::generic::Reg::read) this register and get [`freqb::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`freqb::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
98
99For information about available fields see [`mod@freqb`]
100module"]
101pub type FREQB = crate::Reg<freqb::FREQB_SPEC>;
102#[doc = "For a detailed description see freqa register"]
103pub mod freqb;
104#[doc = "DORMANT (rw) register accessor: Ring Oscillator pause control  
105 This is used to save power by pausing the ROSC  
106 On power-up this field is initialised to WAKE  
107 An invalid write will also select WAKE  
108 Warning: setup the irq before selecting dormant mode  
109
110You can [`read`](crate::generic::Reg::read) this register and get [`dormant::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dormant::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
111
112For information about available fields see [`mod@dormant`]
113module"]
114pub type DORMANT = crate::Reg<dormant::DORMANT_SPEC>;
115#[doc = "Ring Oscillator pause control  
116 This is used to save power by pausing the ROSC  
117 On power-up this field is initialised to WAKE  
118 An invalid write will also select WAKE  
119 Warning: setup the irq before selecting dormant mode"]
120pub mod dormant;
121#[doc = "DIV (rw) register accessor: Controls the output divider  
122
123You can [`read`](crate::generic::Reg::read) this register and get [`div::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`div::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
124
125For information about available fields see [`mod@div`]
126module"]
127pub type DIV = crate::Reg<div::DIV_SPEC>;
128#[doc = "Controls the output divider"]
129pub mod div;
130#[doc = "PHASE (rw) register accessor: Controls the phase shifted output  
131
132You can [`read`](crate::generic::Reg::read) this register and get [`phase::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`phase::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
133
134For information about available fields see [`mod@phase`]
135module"]
136pub type PHASE = crate::Reg<phase::PHASE_SPEC>;
137#[doc = "Controls the phase shifted output"]
138pub mod phase;
139#[doc = "RANDOMBIT (r) register accessor: This just reads the state of the oscillator output so randomness is compromised if the ring oscillator is stopped or run at a harmonic of the bus frequency  
140
141You can [`read`](crate::generic::Reg::read) this register and get [`randombit::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
142
143For information about available fields see [`mod@randombit`]
144module"]
145pub type RANDOMBIT = crate::Reg<randombit::RANDOMBIT_SPEC>;
146#[doc = "This just reads the state of the oscillator output so randomness is compromised if the ring oscillator is stopped or run at a harmonic of the bus frequency"]
147pub mod randombit;
148#[doc = "STATUS (r) register accessor: Ring Oscillator Status  
149
150You can [`read`](crate::generic::Reg::read) this register and get [`status::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
151
152For information about available fields see [`mod@status`]
153module"]
154pub type STATUS = crate::Reg<status::STATUS_SPEC>;
155#[doc = "Ring Oscillator Status"]
156pub mod status;
rp2040_pac/rosc.rs

rp2040_pac/
rosc.rs
