rp2040_pac/uart0/
uartdmacr.rs

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1#[doc = "Register `UARTDMACR` reader"]
2pub type R = crate::R<UARTDMACR_SPEC>;
3#[doc = "Register `UARTDMACR` writer"]
4pub type W = crate::W<UARTDMACR_SPEC>;
5#[doc = "Field `RXDMAE` reader - Receive DMA enable. If this bit is set to 1, DMA for the receive FIFO is enabled."]
6pub type RXDMAE_R = crate::BitReader;
7#[doc = "Field `RXDMAE` writer - Receive DMA enable. If this bit is set to 1, DMA for the receive FIFO is enabled."]
8pub type RXDMAE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `TXDMAE` reader - Transmit DMA enable. If this bit is set to 1, DMA for the transmit FIFO is enabled."]
10pub type TXDMAE_R = crate::BitReader;
11#[doc = "Field `TXDMAE` writer - Transmit DMA enable. If this bit is set to 1, DMA for the transmit FIFO is enabled."]
12pub type TXDMAE_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `DMAONERR` reader - DMA on error. If this bit is set to 1, the DMA receive request outputs, UARTRXDMASREQ or UARTRXDMABREQ, are disabled when the UART error interrupt is asserted."]
14pub type DMAONERR_R = crate::BitReader;
15#[doc = "Field `DMAONERR` writer - DMA on error. If this bit is set to 1, the DMA receive request outputs, UARTRXDMASREQ or UARTRXDMABREQ, are disabled when the UART error interrupt is asserted."]
16pub type DMAONERR_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - Receive DMA enable. If this bit is set to 1, DMA for the receive FIFO is enabled."]
19    #[inline(always)]
20    pub fn rxdmae(&self) -> RXDMAE_R {
21        RXDMAE_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - Transmit DMA enable. If this bit is set to 1, DMA for the transmit FIFO is enabled."]
24    #[inline(always)]
25    pub fn txdmae(&self) -> TXDMAE_R {
26        TXDMAE_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bit 2 - DMA on error. If this bit is set to 1, the DMA receive request outputs, UARTRXDMASREQ or UARTRXDMABREQ, are disabled when the UART error interrupt is asserted."]
29    #[inline(always)]
30    pub fn dmaonerr(&self) -> DMAONERR_R {
31        DMAONERR_R::new(((self.bits >> 2) & 1) != 0)
32    }
33}
34impl W {
35    #[doc = "Bit 0 - Receive DMA enable. If this bit is set to 1, DMA for the receive FIFO is enabled."]
36    #[inline(always)]
37    #[must_use]
38    pub fn rxdmae(&mut self) -> RXDMAE_W<UARTDMACR_SPEC> {
39        RXDMAE_W::new(self, 0)
40    }
41    #[doc = "Bit 1 - Transmit DMA enable. If this bit is set to 1, DMA for the transmit FIFO is enabled."]
42    #[inline(always)]
43    #[must_use]
44    pub fn txdmae(&mut self) -> TXDMAE_W<UARTDMACR_SPEC> {
45        TXDMAE_W::new(self, 1)
46    }
47    #[doc = "Bit 2 - DMA on error. If this bit is set to 1, the DMA receive request outputs, UARTRXDMASREQ or UARTRXDMABREQ, are disabled when the UART error interrupt is asserted."]
48    #[inline(always)]
49    #[must_use]
50    pub fn dmaonerr(&mut self) -> DMAONERR_W<UARTDMACR_SPEC> {
51        DMAONERR_W::new(self, 2)
52    }
53    #[doc = r" Writes raw bits to the register."]
54    #[doc = r""]
55    #[doc = r" # Safety"]
56    #[doc = r""]
57    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
58    #[inline(always)]
59    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
60        self.bits = bits;
61        self
62    }
63}
64#[doc = "DMA Control Register, UARTDMACR  
65
66You can [`read`](crate::generic::Reg::read) this register and get [`uartdmacr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartdmacr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
67pub struct UARTDMACR_SPEC;
68impl crate::RegisterSpec for UARTDMACR_SPEC {
69    type Ux = u32;
70}
71#[doc = "`read()` method returns [`uartdmacr::R`](R) reader structure"]
72impl crate::Readable for UARTDMACR_SPEC {}
73#[doc = "`write(|w| ..)` method takes [`uartdmacr::W`](W) writer structure"]
74impl crate::Writable for UARTDMACR_SPEC {
75    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
76    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
77}
78#[doc = "`reset()` method sets UARTDMACR to value 0"]
79impl crate::Resettable for UARTDMACR_SPEC {
80    const RESET_VALUE: u32 = 0;
81}
rp2040_pac/uart0/uartdmacr.rs

rp2040_pac/uart0/
uartdmacr.rs
