rp2040_pac/spi0/
sspcr0.rs

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1#[doc = "Register `SSPCR0` reader"]
2pub type R = crate::R<SSPCR0_SPEC>;
3#[doc = "Register `SSPCR0` writer"]
4pub type W = crate::W<SSPCR0_SPEC>;
5#[doc = "Field `DSS` reader - Data Size Select: 0000 Reserved, undefined operation. 0001 Reserved, undefined operation. 0010 Reserved, undefined operation. 0011 4-bit data. 0100 5-bit data. 0101 6-bit data. 0110 7-bit data. 0111 8-bit data. 1000 9-bit data. 1001 10-bit data. 1010 11-bit data. 1011 12-bit data. 1100 13-bit data. 1101 14-bit data. 1110 15-bit data. 1111 16-bit data."]
6pub type DSS_R = crate::FieldReader;
7#[doc = "Field `DSS` writer - Data Size Select: 0000 Reserved, undefined operation. 0001 Reserved, undefined operation. 0010 Reserved, undefined operation. 0011 4-bit data. 0100 5-bit data. 0101 6-bit data. 0110 7-bit data. 0111 8-bit data. 1000 9-bit data. 1001 10-bit data. 1010 11-bit data. 1011 12-bit data. 1100 13-bit data. 1101 14-bit data. 1110 15-bit data. 1111 16-bit data."]
8pub type DSS_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
9#[doc = "Field `FRF` reader - Frame format."]
10pub type FRF_R = crate::FieldReader<FRF_A>;
11#[doc = "Frame format.  
12
13Value on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq, Eq)]
15#[repr(u8)]
16pub enum FRF_A {
17    #[doc = "0: Motorola SPI frame format"]
18    MOTOROLA = 0,
19    #[doc = "1: Texas Instruments synchronous serial frame format"]
20    TEXAS_INSTRUMENTS = 1,
21    #[doc = "2: National Semiconductor Microwire frame format"]
22    NATIONAL_SEMICONDUCTOR_MICROWIRE = 2,
23}
24impl From<FRF_A> for u8 {
25    #[inline(always)]
26    fn from(variant: FRF_A) -> Self {
27        variant as _
28    }
29}
30impl crate::FieldSpec for FRF_A {
31    type Ux = u8;
32}
33impl FRF_R {
34    #[doc = "Get enumerated values variant"]
35    #[inline(always)]
36    pub const fn variant(&self) -> Option<FRF_A> {
37        match self.bits {
38            0 => Some(FRF_A::MOTOROLA),
39            1 => Some(FRF_A::TEXAS_INSTRUMENTS),
40            2 => Some(FRF_A::NATIONAL_SEMICONDUCTOR_MICROWIRE),
41            _ => None,
42        }
43    }
44    #[doc = "Motorola SPI frame format"]
45    #[inline(always)]
46    pub fn is_motorola(&self) -> bool {
47        *self == FRF_A::MOTOROLA
48    }
49    #[doc = "Texas Instruments synchronous serial frame format"]
50    #[inline(always)]
51    pub fn is_texas_instruments(&self) -> bool {
52        *self == FRF_A::TEXAS_INSTRUMENTS
53    }
54    #[doc = "National Semiconductor Microwire frame format"]
55    #[inline(always)]
56    pub fn is_national_semiconductor_microwire(&self) -> bool {
57        *self == FRF_A::NATIONAL_SEMICONDUCTOR_MICROWIRE
58    }
59}
60#[doc = "Field `FRF` writer - Frame format."]
61pub type FRF_W<'a, REG> = crate::FieldWriter<'a, REG, 2, FRF_A>;
62impl<'a, REG> FRF_W<'a, REG>
63where
64    REG: crate::Writable + crate::RegisterSpec,
65    REG::Ux: From<u8>,
66{
67    #[doc = "Motorola SPI frame format"]
68    #[inline(always)]
69    pub fn motorola(self) -> &'a mut crate::W<REG> {
70        self.variant(FRF_A::MOTOROLA)
71    }
72    #[doc = "Texas Instruments synchronous serial frame format"]
73    #[inline(always)]
74    pub fn texas_instruments(self) -> &'a mut crate::W<REG> {
75        self.variant(FRF_A::TEXAS_INSTRUMENTS)
76    }
77    #[doc = "National Semiconductor Microwire frame format"]
78    #[inline(always)]
79    pub fn national_semiconductor_microwire(self) -> &'a mut crate::W<REG> {
80        self.variant(FRF_A::NATIONAL_SEMICONDUCTOR_MICROWIRE)
81    }
82}
83#[doc = "Field `SPO` reader - SSPCLKOUT polarity, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10."]
84pub type SPO_R = crate::BitReader;
85#[doc = "Field `SPO` writer - SSPCLKOUT polarity, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10."]
86pub type SPO_W<'a, REG> = crate::BitWriter<'a, REG>;
87#[doc = "Field `SPH` reader - SSPCLKOUT phase, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10."]
88pub type SPH_R = crate::BitReader;
89#[doc = "Field `SPH` writer - SSPCLKOUT phase, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10."]
90pub type SPH_W<'a, REG> = crate::BitWriter<'a, REG>;
91#[doc = "Field `SCR` reader - Serial clock rate. The value SCR is used to generate the transmit and receive bit rate of the PrimeCell SSP. The bit rate is: F SSPCLK CPSDVSR x (1+SCR) where CPSDVSR is an even value from 2-254, programmed through the SSPCPSR register and SCR is a value from 0-255."]
92pub type SCR_R = crate::FieldReader;
93#[doc = "Field `SCR` writer - Serial clock rate. The value SCR is used to generate the transmit and receive bit rate of the PrimeCell SSP. The bit rate is: F SSPCLK CPSDVSR x (1+SCR) where CPSDVSR is an even value from 2-254, programmed through the SSPCPSR register and SCR is a value from 0-255."]
94pub type SCR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
95impl R {
96    #[doc = "Bits 0:3 - Data Size Select: 0000 Reserved, undefined operation. 0001 Reserved, undefined operation. 0010 Reserved, undefined operation. 0011 4-bit data. 0100 5-bit data. 0101 6-bit data. 0110 7-bit data. 0111 8-bit data. 1000 9-bit data. 1001 10-bit data. 1010 11-bit data. 1011 12-bit data. 1100 13-bit data. 1101 14-bit data. 1110 15-bit data. 1111 16-bit data."]
97    #[inline(always)]
98    pub fn dss(&self) -> DSS_R {
99        DSS_R::new((self.bits & 0x0f) as u8)
100    }
101    #[doc = "Bits 4:5 - Frame format."]
102    #[inline(always)]
103    pub fn frf(&self) -> FRF_R {
104        FRF_R::new(((self.bits >> 4) & 3) as u8)
105    }
106    #[doc = "Bit 6 - SSPCLKOUT polarity, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10."]
107    #[inline(always)]
108    pub fn spo(&self) -> SPO_R {
109        SPO_R::new(((self.bits >> 6) & 1) != 0)
110    }
111    #[doc = "Bit 7 - SSPCLKOUT phase, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10."]
112    #[inline(always)]
113    pub fn sph(&self) -> SPH_R {
114        SPH_R::new(((self.bits >> 7) & 1) != 0)
115    }
116    #[doc = "Bits 8:15 - Serial clock rate. The value SCR is used to generate the transmit and receive bit rate of the PrimeCell SSP. The bit rate is: F SSPCLK CPSDVSR x (1+SCR) where CPSDVSR is an even value from 2-254, programmed through the SSPCPSR register and SCR is a value from 0-255."]
117    #[inline(always)]
118    pub fn scr(&self) -> SCR_R {
119        SCR_R::new(((self.bits >> 8) & 0xff) as u8)
120    }
121}
122impl W {
123    #[doc = "Bits 0:3 - Data Size Select: 0000 Reserved, undefined operation. 0001 Reserved, undefined operation. 0010 Reserved, undefined operation. 0011 4-bit data. 0100 5-bit data. 0101 6-bit data. 0110 7-bit data. 0111 8-bit data. 1000 9-bit data. 1001 10-bit data. 1010 11-bit data. 1011 12-bit data. 1100 13-bit data. 1101 14-bit data. 1110 15-bit data. 1111 16-bit data."]
124    #[inline(always)]
125    #[must_use]
126    pub fn dss(&mut self) -> DSS_W<SSPCR0_SPEC> {
127        DSS_W::new(self, 0)
128    }
129    #[doc = "Bits 4:5 - Frame format."]
130    #[inline(always)]
131    #[must_use]
132    pub fn frf(&mut self) -> FRF_W<SSPCR0_SPEC> {
133        FRF_W::new(self, 4)
134    }
135    #[doc = "Bit 6 - SSPCLKOUT polarity, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10."]
136    #[inline(always)]
137    #[must_use]
138    pub fn spo(&mut self) -> SPO_W<SSPCR0_SPEC> {
139        SPO_W::new(self, 6)
140    }
141    #[doc = "Bit 7 - SSPCLKOUT phase, applicable to Motorola SPI frame format only. See Motorola SPI frame format on page 2-10."]
142    #[inline(always)]
143    #[must_use]
144    pub fn sph(&mut self) -> SPH_W<SSPCR0_SPEC> {
145        SPH_W::new(self, 7)
146    }
147    #[doc = "Bits 8:15 - Serial clock rate. The value SCR is used to generate the transmit and receive bit rate of the PrimeCell SSP. The bit rate is: F SSPCLK CPSDVSR x (1+SCR) where CPSDVSR is an even value from 2-254, programmed through the SSPCPSR register and SCR is a value from 0-255."]
148    #[inline(always)]
149    #[must_use]
150    pub fn scr(&mut self) -> SCR_W<SSPCR0_SPEC> {
151        SCR_W::new(self, 8)
152    }
153    #[doc = r" Writes raw bits to the register."]
154    #[doc = r""]
155    #[doc = r" # Safety"]
156    #[doc = r""]
157    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
158    #[inline(always)]
159    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
160        self.bits = bits;
161        self
162    }
163}
164#[doc = "Control register 0, SSPCR0 on page 3-4  
165
166You can [`read`](crate::generic::Reg::read) this register and get [`sspcr0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sspcr0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
167pub struct SSPCR0_SPEC;
168impl crate::RegisterSpec for SSPCR0_SPEC {
169    type Ux = u32;
170}
171#[doc = "`read()` method returns [`sspcr0::R`](R) reader structure"]
172impl crate::Readable for SSPCR0_SPEC {}
173#[doc = "`write(|w| ..)` method takes [`sspcr0::W`](W) writer structure"]
174impl crate::Writable for SSPCR0_SPEC {
175    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
176    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
177}
178#[doc = "`reset()` method sets SSPCR0 to value 0"]
179impl crate::Resettable for SSPCR0_SPEC {
180    const RESET_VALUE: u32 = 0;
181}
rp2040_pac/spi0/sspcr0.rs

rp2040_pac/spi0/
sspcr0.rs
