rp2040_pac/sio/
fifo_wr.rs

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1#[doc = "Register `FIFO_WR` writer"]
2pub type W = crate::W<FIFO_WR_SPEC>;
3impl core::fmt::Debug for crate::generic::Reg<FIFO_WR_SPEC> {
4    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
5        write!(f, "(not readable)")
6    }
7}
8impl W {
9    #[doc = r" Writes raw bits to the register."]
10    #[doc = r""]
11    #[doc = r" # Safety"]
12    #[doc = r""]
13    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
14    #[inline(always)]
15    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
16        self.bits = bits;
17        self
18    }
19}
20#[doc = "Write access to this core's TX FIFO  
21
22You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fifo_wr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
23pub struct FIFO_WR_SPEC;
24impl crate::RegisterSpec for FIFO_WR_SPEC {
25    type Ux = u32;
26}
27#[doc = "`write(|w| ..)` method takes [`fifo_wr::W`](W) writer structure"]
28impl crate::Writable for FIFO_WR_SPEC {
29    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
30    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
31}
32#[doc = "`reset()` method sets FIFO_WR to value 0"]
33impl crate::Resettable for FIFO_WR_SPEC {
34    const RESET_VALUE: u32 = 0;
35}
rp2040_pac/sio/fifo_wr.rs

rp2040_pac/sio/
fifo_wr.rs
