nrf52840_pac/qspi/
addrconf.rs

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1#[doc = "Register `ADDRCONF` reader"]
2pub struct R(crate::R<ADDRCONF_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ADDRCONF_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ADDRCONF_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ADDRCONF_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ADDRCONF` writer"]
17pub struct W(crate::W<ADDRCONF_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ADDRCONF_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ADDRCONF_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ADDRCONF_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `OPCODE` reader - Opcode that enters the 32-bit addressing mode."]
38pub type OPCODE_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `OPCODE` writer - Opcode that enters the 32-bit addressing mode."]
40pub type OPCODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRCONF_SPEC, u8, u8, 8, O>;
41#[doc = "Field `BYTE0` reader - Byte 0 following opcode."]
42pub type BYTE0_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `BYTE0` writer - Byte 0 following opcode."]
44pub type BYTE0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRCONF_SPEC, u8, u8, 8, O>;
45#[doc = "Field `BYTE1` reader - Byte 1 following byte 0."]
46pub type BYTE1_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `BYTE1` writer - Byte 1 following byte 0."]
48pub type BYTE1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRCONF_SPEC, u8, u8, 8, O>;
49#[doc = "Field `MODE` reader - Extended addressing mode."]
50pub type MODE_R = crate::FieldReader<u8, MODE_A>;
51#[doc = "Extended addressing mode.\n\nValue on reset: 0"]
52#[derive(Clone, Copy, Debug, PartialEq)]
53#[repr(u8)]
54pub enum MODE_A {
55    #[doc = "0: Do not send any instruction."]
56    NO_INSTR = 0,
57    #[doc = "1: Send opcode."]
58    OPCODE = 1,
59    #[doc = "2: Send opcode, byte0."]
60    OP_BYTE0 = 2,
61    #[doc = "3: Send opcode, byte0, byte1."]
62    ALL = 3,
63}
64impl From<MODE_A> for u8 {
65    #[inline(always)]
66    fn from(variant: MODE_A) -> Self {
67        variant as _
68    }
69}
70impl MODE_R {
71    #[doc = "Get enumerated values variant"]
72    #[inline(always)]
73    pub fn variant(&self) -> MODE_A {
74        match self.bits {
75            0 => MODE_A::NO_INSTR,
76            1 => MODE_A::OPCODE,
77            2 => MODE_A::OP_BYTE0,
78            3 => MODE_A::ALL,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `NO_INSTR`"]
83    #[inline(always)]
84    pub fn is_no_instr(&self) -> bool {
85        *self == MODE_A::NO_INSTR
86    }
87    #[doc = "Checks if the value of the field is `OPCODE`"]
88    #[inline(always)]
89    pub fn is_opcode(&self) -> bool {
90        *self == MODE_A::OPCODE
91    }
92    #[doc = "Checks if the value of the field is `OP_BYTE0`"]
93    #[inline(always)]
94    pub fn is_op_byte0(&self) -> bool {
95        *self == MODE_A::OP_BYTE0
96    }
97    #[doc = "Checks if the value of the field is `ALL`"]
98    #[inline(always)]
99    pub fn is_all(&self) -> bool {
100        *self == MODE_A::ALL
101    }
102}
103#[doc = "Field `MODE` writer - Extended addressing mode."]
104pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, ADDRCONF_SPEC, u8, MODE_A, 2, O>;
105impl<'a, const O: u8> MODE_W<'a, O> {
106    #[doc = "Do not send any instruction."]
107    #[inline(always)]
108    pub fn no_instr(self) -> &'a mut W {
109        self.variant(MODE_A::NO_INSTR)
110    }
111    #[doc = "Send opcode."]
112    #[inline(always)]
113    pub fn opcode(self) -> &'a mut W {
114        self.variant(MODE_A::OPCODE)
115    }
116    #[doc = "Send opcode, byte0."]
117    #[inline(always)]
118    pub fn op_byte0(self) -> &'a mut W {
119        self.variant(MODE_A::OP_BYTE0)
120    }
121    #[doc = "Send opcode, byte0, byte1."]
122    #[inline(always)]
123    pub fn all(self) -> &'a mut W {
124        self.variant(MODE_A::ALL)
125    }
126}
127#[doc = "Field `WIPWAIT` reader - Wait for write complete before sending command."]
128pub type WIPWAIT_R = crate::BitReader<WIPWAIT_A>;
129#[doc = "Wait for write complete before sending command.\n\nValue on reset: 0"]
130#[derive(Clone, Copy, Debug, PartialEq)]
131pub enum WIPWAIT_A {
132    #[doc = "0: No wait."]
133    DISABLE = 0,
134    #[doc = "1: Wait."]
135    ENABLE = 1,
136}
137impl From<WIPWAIT_A> for bool {
138    #[inline(always)]
139    fn from(variant: WIPWAIT_A) -> Self {
140        variant as u8 != 0
141    }
142}
143impl WIPWAIT_R {
144    #[doc = "Get enumerated values variant"]
145    #[inline(always)]
146    pub fn variant(&self) -> WIPWAIT_A {
147        match self.bits {
148            false => WIPWAIT_A::DISABLE,
149            true => WIPWAIT_A::ENABLE,
150        }
151    }
152    #[doc = "Checks if the value of the field is `DISABLE`"]
153    #[inline(always)]
154    pub fn is_disable(&self) -> bool {
155        *self == WIPWAIT_A::DISABLE
156    }
157    #[doc = "Checks if the value of the field is `ENABLE`"]
158    #[inline(always)]
159    pub fn is_enable(&self) -> bool {
160        *self == WIPWAIT_A::ENABLE
161    }
162}
163#[doc = "Field `WIPWAIT` writer - Wait for write complete before sending command."]
164pub type WIPWAIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADDRCONF_SPEC, WIPWAIT_A, O>;
165impl<'a, const O: u8> WIPWAIT_W<'a, O> {
166    #[doc = "No wait."]
167    #[inline(always)]
168    pub fn disable(self) -> &'a mut W {
169        self.variant(WIPWAIT_A::DISABLE)
170    }
171    #[doc = "Wait."]
172    #[inline(always)]
173    pub fn enable(self) -> &'a mut W {
174        self.variant(WIPWAIT_A::ENABLE)
175    }
176}
177#[doc = "Field `WREN` reader - Send WREN (write enable opcode 0x06) before instruction."]
178pub type WREN_R = crate::BitReader<WREN_A>;
179#[doc = "Send WREN (write enable opcode 0x06) before instruction.\n\nValue on reset: 0"]
180#[derive(Clone, Copy, Debug, PartialEq)]
181pub enum WREN_A {
182    #[doc = "0: Do not send WREN."]
183    DISABLE = 0,
184    #[doc = "1: Send WREN."]
185    ENABLE = 1,
186}
187impl From<WREN_A> for bool {
188    #[inline(always)]
189    fn from(variant: WREN_A) -> Self {
190        variant as u8 != 0
191    }
192}
193impl WREN_R {
194    #[doc = "Get enumerated values variant"]
195    #[inline(always)]
196    pub fn variant(&self) -> WREN_A {
197        match self.bits {
198            false => WREN_A::DISABLE,
199            true => WREN_A::ENABLE,
200        }
201    }
202    #[doc = "Checks if the value of the field is `DISABLE`"]
203    #[inline(always)]
204    pub fn is_disable(&self) -> bool {
205        *self == WREN_A::DISABLE
206    }
207    #[doc = "Checks if the value of the field is `ENABLE`"]
208    #[inline(always)]
209    pub fn is_enable(&self) -> bool {
210        *self == WREN_A::ENABLE
211    }
212}
213#[doc = "Field `WREN` writer - Send WREN (write enable opcode 0x06) before instruction."]
214pub type WREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ADDRCONF_SPEC, WREN_A, O>;
215impl<'a, const O: u8> WREN_W<'a, O> {
216    #[doc = "Do not send WREN."]
217    #[inline(always)]
218    pub fn disable(self) -> &'a mut W {
219        self.variant(WREN_A::DISABLE)
220    }
221    #[doc = "Send WREN."]
222    #[inline(always)]
223    pub fn enable(self) -> &'a mut W {
224        self.variant(WREN_A::ENABLE)
225    }
226}
227impl R {
228    #[doc = "Bits 0:7 - Opcode that enters the 32-bit addressing mode."]
229    #[inline(always)]
230    pub fn opcode(&self) -> OPCODE_R {
231        OPCODE_R::new((self.bits & 0xff) as u8)
232    }
233    #[doc = "Bits 8:15 - Byte 0 following opcode."]
234    #[inline(always)]
235    pub fn byte0(&self) -> BYTE0_R {
236        BYTE0_R::new(((self.bits >> 8) & 0xff) as u8)
237    }
238    #[doc = "Bits 16:23 - Byte 1 following byte 0."]
239    #[inline(always)]
240    pub fn byte1(&self) -> BYTE1_R {
241        BYTE1_R::new(((self.bits >> 16) & 0xff) as u8)
242    }
243    #[doc = "Bits 24:25 - Extended addressing mode."]
244    #[inline(always)]
245    pub fn mode(&self) -> MODE_R {
246        MODE_R::new(((self.bits >> 24) & 3) as u8)
247    }
248    #[doc = "Bit 26 - Wait for write complete before sending command."]
249    #[inline(always)]
250    pub fn wipwait(&self) -> WIPWAIT_R {
251        WIPWAIT_R::new(((self.bits >> 26) & 1) != 0)
252    }
253    #[doc = "Bit 27 - Send WREN (write enable opcode 0x06) before instruction."]
254    #[inline(always)]
255    pub fn wren(&self) -> WREN_R {
256        WREN_R::new(((self.bits >> 27) & 1) != 0)
257    }
258}
259impl W {
260    #[doc = "Bits 0:7 - Opcode that enters the 32-bit addressing mode."]
261    #[inline(always)]
262    pub fn opcode(&mut self) -> OPCODE_W<0> {
263        OPCODE_W::new(self)
264    }
265    #[doc = "Bits 8:15 - Byte 0 following opcode."]
266    #[inline(always)]
267    pub fn byte0(&mut self) -> BYTE0_W<8> {
268        BYTE0_W::new(self)
269    }
270    #[doc = "Bits 16:23 - Byte 1 following byte 0."]
271    #[inline(always)]
272    pub fn byte1(&mut self) -> BYTE1_W<16> {
273        BYTE1_W::new(self)
274    }
275    #[doc = "Bits 24:25 - Extended addressing mode."]
276    #[inline(always)]
277    pub fn mode(&mut self) -> MODE_W<24> {
278        MODE_W::new(self)
279    }
280    #[doc = "Bit 26 - Wait for write complete before sending command."]
281    #[inline(always)]
282    pub fn wipwait(&mut self) -> WIPWAIT_W<26> {
283        WIPWAIT_W::new(self)
284    }
285    #[doc = "Bit 27 - Send WREN (write enable opcode 0x06) before instruction."]
286    #[inline(always)]
287    pub fn wren(&mut self) -> WREN_W<27> {
288        WREN_W::new(self)
289    }
290    #[doc = "Writes raw bits to the register."]
291    #[inline(always)]
292    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
293        self.0.bits(bits);
294        self
295    }
296}
297#[doc = "Extended address configuration.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addrconf](index.html) module"]
298pub struct ADDRCONF_SPEC;
299impl crate::RegisterSpec for ADDRCONF_SPEC {
300    type Ux = u32;
301}
302#[doc = "`read()` method returns [addrconf::R](R) reader structure"]
303impl crate::Readable for ADDRCONF_SPEC {
304    type Reader = R;
305}
306#[doc = "`write(|w| ..)` method takes [addrconf::W](W) writer structure"]
307impl crate::Writable for ADDRCONF_SPEC {
308    type Writer = W;
309}
310#[doc = "`reset()` method sets ADDRCONF to value 0xb7"]
311impl crate::Resettable for ADDRCONF_SPEC {
312    #[inline(always)]
313    fn reset_value() -> Self::Ux {
314        0xb7
315    }
316}
nrf52840_pac/qspi/addrconf.rs

nrf52840_pac/qspi/
addrconf.rs
