rp2040_pac/
uart0.rs

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1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    uartdr: UARTDR,
5    uartrsr: UARTRSR,
6    _reserved2: [u8; 0x10],
7    uartfr: UARTFR,
8    _reserved3: [u8; 0x04],
9    uartilpr: UARTILPR,
10    uartibrd: UARTIBRD,
11    uartfbrd: UARTFBRD,
12    uartlcr_h: UARTLCR_H,
13    uartcr: UARTCR,
14    uartifls: UARTIFLS,
15    uartimsc: UARTIMSC,
16    uartris: UARTRIS,
17    uartmis: UARTMIS,
18    uarticr: UARTICR,
19    uartdmacr: UARTDMACR,
20    _reserved14: [u8; 0x0f94],
21    uartperiphid0: UARTPERIPHID0,
22    uartperiphid1: UARTPERIPHID1,
23    uartperiphid2: UARTPERIPHID2,
24    uartperiphid3: UARTPERIPHID3,
25    uartpcellid0: UARTPCELLID0,
26    uartpcellid1: UARTPCELLID1,
27    uartpcellid2: UARTPCELLID2,
28    uartpcellid3: UARTPCELLID3,
29}
30impl RegisterBlock {
31    #[doc = "0x00 - Data Register, UARTDR"]
32    #[inline(always)]
33    pub const fn uartdr(&self) -> &UARTDR {
34        &self.uartdr
35    }
36    #[doc = "0x04 - Receive Status Register/Error Clear Register, UARTRSR/UARTECR"]
37    #[inline(always)]
38    pub const fn uartrsr(&self) -> &UARTRSR {
39        &self.uartrsr
40    }
41    #[doc = "0x18 - Flag Register, UARTFR"]
42    #[inline(always)]
43    pub const fn uartfr(&self) -> &UARTFR {
44        &self.uartfr
45    }
46    #[doc = "0x20 - IrDA Low-Power Counter Register, UARTILPR"]
47    #[inline(always)]
48    pub const fn uartilpr(&self) -> &UARTILPR {
49        &self.uartilpr
50    }
51    #[doc = "0x24 - Integer Baud Rate Register, UARTIBRD"]
52    #[inline(always)]
53    pub const fn uartibrd(&self) -> &UARTIBRD {
54        &self.uartibrd
55    }
56    #[doc = "0x28 - Fractional Baud Rate Register, UARTFBRD"]
57    #[inline(always)]
58    pub const fn uartfbrd(&self) -> &UARTFBRD {
59        &self.uartfbrd
60    }
61    #[doc = "0x2c - Line Control Register, UARTLCR_H"]
62    #[inline(always)]
63    pub const fn uartlcr_h(&self) -> &UARTLCR_H {
64        &self.uartlcr_h
65    }
66    #[doc = "0x30 - Control Register, UARTCR"]
67    #[inline(always)]
68    pub const fn uartcr(&self) -> &UARTCR {
69        &self.uartcr
70    }
71    #[doc = "0x34 - Interrupt FIFO Level Select Register, UARTIFLS"]
72    #[inline(always)]
73    pub const fn uartifls(&self) -> &UARTIFLS {
74        &self.uartifls
75    }
76    #[doc = "0x38 - Interrupt Mask Set/Clear Register, UARTIMSC"]
77    #[inline(always)]
78    pub const fn uartimsc(&self) -> &UARTIMSC {
79        &self.uartimsc
80    }
81    #[doc = "0x3c - Raw Interrupt Status Register, UARTRIS"]
82    #[inline(always)]
83    pub const fn uartris(&self) -> &UARTRIS {
84        &self.uartris
85    }
86    #[doc = "0x40 - Masked Interrupt Status Register, UARTMIS"]
87    #[inline(always)]
88    pub const fn uartmis(&self) -> &UARTMIS {
89        &self.uartmis
90    }
91    #[doc = "0x44 - Interrupt Clear Register, UARTICR"]
92    #[inline(always)]
93    pub const fn uarticr(&self) -> &UARTICR {
94        &self.uarticr
95    }
96    #[doc = "0x48 - DMA Control Register, UARTDMACR"]
97    #[inline(always)]
98    pub const fn uartdmacr(&self) -> &UARTDMACR {
99        &self.uartdmacr
100    }
101    #[doc = "0xfe0 - UARTPeriphID0 Register"]
102    #[inline(always)]
103    pub const fn uartperiphid0(&self) -> &UARTPERIPHID0 {
104        &self.uartperiphid0
105    }
106    #[doc = "0xfe4 - UARTPeriphID1 Register"]
107    #[inline(always)]
108    pub const fn uartperiphid1(&self) -> &UARTPERIPHID1 {
109        &self.uartperiphid1
110    }
111    #[doc = "0xfe8 - UARTPeriphID2 Register"]
112    #[inline(always)]
113    pub const fn uartperiphid2(&self) -> &UARTPERIPHID2 {
114        &self.uartperiphid2
115    }
116    #[doc = "0xfec - UARTPeriphID3 Register"]
117    #[inline(always)]
118    pub const fn uartperiphid3(&self) -> &UARTPERIPHID3 {
119        &self.uartperiphid3
120    }
121    #[doc = "0xff0 - UARTPCellID0 Register"]
122    #[inline(always)]
123    pub const fn uartpcellid0(&self) -> &UARTPCELLID0 {
124        &self.uartpcellid0
125    }
126    #[doc = "0xff4 - UARTPCellID1 Register"]
127    #[inline(always)]
128    pub const fn uartpcellid1(&self) -> &UARTPCELLID1 {
129        &self.uartpcellid1
130    }
131    #[doc = "0xff8 - UARTPCellID2 Register"]
132    #[inline(always)]
133    pub const fn uartpcellid2(&self) -> &UARTPCELLID2 {
134        &self.uartpcellid2
135    }
136    #[doc = "0xffc - UARTPCellID3 Register"]
137    #[inline(always)]
138    pub const fn uartpcellid3(&self) -> &UARTPCELLID3 {
139        &self.uartpcellid3
140    }
141}
142#[doc = "UARTDR (rw) register accessor: Data Register, UARTDR  
143
144You can [`read`](crate::generic::Reg::read) this register and get [`uartdr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartdr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
145
146For information about available fields see [`mod@uartdr`]
147module"]
148pub type UARTDR = crate::Reg<uartdr::UARTDR_SPEC>;
149#[doc = "Data Register, UARTDR"]
150pub mod uartdr;
151#[doc = "UARTRSR (rw) register accessor: Receive Status Register/Error Clear Register, UARTRSR/UARTECR  
152
153You can [`read`](crate::generic::Reg::read) this register and get [`uartrsr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartrsr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
154
155For information about available fields see [`mod@uartrsr`]
156module"]
157pub type UARTRSR = crate::Reg<uartrsr::UARTRSR_SPEC>;
158#[doc = "Receive Status Register/Error Clear Register, UARTRSR/UARTECR"]
159pub mod uartrsr;
160#[doc = "UARTFR (r) register accessor: Flag Register, UARTFR  
161
162You can [`read`](crate::generic::Reg::read) this register and get [`uartfr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
163
164For information about available fields see [`mod@uartfr`]
165module"]
166pub type UARTFR = crate::Reg<uartfr::UARTFR_SPEC>;
167#[doc = "Flag Register, UARTFR"]
168pub mod uartfr;
169#[doc = "UARTILPR (rw) register accessor: IrDA Low-Power Counter Register, UARTILPR  
170
171You can [`read`](crate::generic::Reg::read) this register and get [`uartilpr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartilpr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
172
173For information about available fields see [`mod@uartilpr`]
174module"]
175pub type UARTILPR = crate::Reg<uartilpr::UARTILPR_SPEC>;
176#[doc = "IrDA Low-Power Counter Register, UARTILPR"]
177pub mod uartilpr;
178#[doc = "UARTIBRD (rw) register accessor: Integer Baud Rate Register, UARTIBRD  
179
180You can [`read`](crate::generic::Reg::read) this register and get [`uartibrd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartibrd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
181
182For information about available fields see [`mod@uartibrd`]
183module"]
184pub type UARTIBRD = crate::Reg<uartibrd::UARTIBRD_SPEC>;
185#[doc = "Integer Baud Rate Register, UARTIBRD"]
186pub mod uartibrd;
187#[doc = "UARTFBRD (rw) register accessor: Fractional Baud Rate Register, UARTFBRD  
188
189You can [`read`](crate::generic::Reg::read) this register and get [`uartfbrd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartfbrd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
190
191For information about available fields see [`mod@uartfbrd`]
192module"]
193pub type UARTFBRD = crate::Reg<uartfbrd::UARTFBRD_SPEC>;
194#[doc = "Fractional Baud Rate Register, UARTFBRD"]
195pub mod uartfbrd;
196#[doc = "UARTLCR_H (rw) register accessor: Line Control Register, UARTLCR_H  
197
198You can [`read`](crate::generic::Reg::read) this register and get [`uartlcr_h::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartlcr_h::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
199
200For information about available fields see [`mod@uartlcr_h`]
201module"]
202pub type UARTLCR_H = crate::Reg<uartlcr_h::UARTLCR_H_SPEC>;
203#[doc = "Line Control Register, UARTLCR_H"]
204pub mod uartlcr_h;
205#[doc = "UARTCR (rw) register accessor: Control Register, UARTCR  
206
207You can [`read`](crate::generic::Reg::read) this register and get [`uartcr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
208
209For information about available fields see [`mod@uartcr`]
210module"]
211pub type UARTCR = crate::Reg<uartcr::UARTCR_SPEC>;
212#[doc = "Control Register, UARTCR"]
213pub mod uartcr;
214#[doc = "UARTIFLS (rw) register accessor: Interrupt FIFO Level Select Register, UARTIFLS  
215
216You can [`read`](crate::generic::Reg::read) this register and get [`uartifls::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartifls::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
217
218For information about available fields see [`mod@uartifls`]
219module"]
220pub type UARTIFLS = crate::Reg<uartifls::UARTIFLS_SPEC>;
221#[doc = "Interrupt FIFO Level Select Register, UARTIFLS"]
222pub mod uartifls;
223#[doc = "UARTIMSC (rw) register accessor: Interrupt Mask Set/Clear Register, UARTIMSC  
224
225You can [`read`](crate::generic::Reg::read) this register and get [`uartimsc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartimsc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
226
227For information about available fields see [`mod@uartimsc`]
228module"]
229pub type UARTIMSC = crate::Reg<uartimsc::UARTIMSC_SPEC>;
230#[doc = "Interrupt Mask Set/Clear Register, UARTIMSC"]
231pub mod uartimsc;
232#[doc = "UARTRIS (r) register accessor: Raw Interrupt Status Register, UARTRIS  
233
234You can [`read`](crate::generic::Reg::read) this register and get [`uartris::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
235
236For information about available fields see [`mod@uartris`]
237module"]
238pub type UARTRIS = crate::Reg<uartris::UARTRIS_SPEC>;
239#[doc = "Raw Interrupt Status Register, UARTRIS"]
240pub mod uartris;
241#[doc = "UARTMIS (r) register accessor: Masked Interrupt Status Register, UARTMIS  
242
243You can [`read`](crate::generic::Reg::read) this register and get [`uartmis::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
244
245For information about available fields see [`mod@uartmis`]
246module"]
247pub type UARTMIS = crate::Reg<uartmis::UARTMIS_SPEC>;
248#[doc = "Masked Interrupt Status Register, UARTMIS"]
249pub mod uartmis;
250#[doc = "UARTICR (rw) register accessor: Interrupt Clear Register, UARTICR  
251
252You can [`read`](crate::generic::Reg::read) this register and get [`uarticr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uarticr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
253
254For information about available fields see [`mod@uarticr`]
255module"]
256pub type UARTICR = crate::Reg<uarticr::UARTICR_SPEC>;
257#[doc = "Interrupt Clear Register, UARTICR"]
258pub mod uarticr;
259#[doc = "UARTDMACR (rw) register accessor: DMA Control Register, UARTDMACR  
260
261You can [`read`](crate::generic::Reg::read) this register and get [`uartdmacr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uartdmacr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
262
263For information about available fields see [`mod@uartdmacr`]
264module"]
265pub type UARTDMACR = crate::Reg<uartdmacr::UARTDMACR_SPEC>;
266#[doc = "DMA Control Register, UARTDMACR"]
267pub mod uartdmacr;
268#[doc = "UARTPERIPHID0 (r) register accessor: UARTPeriphID0 Register  
269
270You can [`read`](crate::generic::Reg::read) this register and get [`uartperiphid0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
271
272For information about available fields see [`mod@uartperiphid0`]
273module"]
274pub type UARTPERIPHID0 = crate::Reg<uartperiphid0::UARTPERIPHID0_SPEC>;
275#[doc = "UARTPeriphID0 Register"]
276pub mod uartperiphid0;
277#[doc = "UARTPERIPHID1 (r) register accessor: UARTPeriphID1 Register  
278
279You can [`read`](crate::generic::Reg::read) this register and get [`uartperiphid1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
280
281For information about available fields see [`mod@uartperiphid1`]
282module"]
283pub type UARTPERIPHID1 = crate::Reg<uartperiphid1::UARTPERIPHID1_SPEC>;
284#[doc = "UARTPeriphID1 Register"]
285pub mod uartperiphid1;
286#[doc = "UARTPERIPHID2 (r) register accessor: UARTPeriphID2 Register  
287
288You can [`read`](crate::generic::Reg::read) this register and get [`uartperiphid2::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
289
290For information about available fields see [`mod@uartperiphid2`]
291module"]
292pub type UARTPERIPHID2 = crate::Reg<uartperiphid2::UARTPERIPHID2_SPEC>;
293#[doc = "UARTPeriphID2 Register"]
294pub mod uartperiphid2;
295#[doc = "UARTPERIPHID3 (r) register accessor: UARTPeriphID3 Register  
296
297You can [`read`](crate::generic::Reg::read) this register and get [`uartperiphid3::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
298
299For information about available fields see [`mod@uartperiphid3`]
300module"]
301pub type UARTPERIPHID3 = crate::Reg<uartperiphid3::UARTPERIPHID3_SPEC>;
302#[doc = "UARTPeriphID3 Register"]
303pub mod uartperiphid3;
304#[doc = "UARTPCELLID0 (r) register accessor: UARTPCellID0 Register  
305
306You can [`read`](crate::generic::Reg::read) this register and get [`uartpcellid0::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
307
308For information about available fields see [`mod@uartpcellid0`]
309module"]
310pub type UARTPCELLID0 = crate::Reg<uartpcellid0::UARTPCELLID0_SPEC>;
311#[doc = "UARTPCellID0 Register"]
312pub mod uartpcellid0;
313#[doc = "UARTPCELLID1 (r) register accessor: UARTPCellID1 Register  
314
315You can [`read`](crate::generic::Reg::read) this register and get [`uartpcellid1::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
316
317For information about available fields see [`mod@uartpcellid1`]
318module"]
319pub type UARTPCELLID1 = crate::Reg<uartpcellid1::UARTPCELLID1_SPEC>;
320#[doc = "UARTPCellID1 Register"]
321pub mod uartpcellid1;
322#[doc = "UARTPCELLID2 (r) register accessor: UARTPCellID2 Register  
323
324You can [`read`](crate::generic::Reg::read) this register and get [`uartpcellid2::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
325
326For information about available fields see [`mod@uartpcellid2`]
327module"]
328pub type UARTPCELLID2 = crate::Reg<uartpcellid2::UARTPCELLID2_SPEC>;
329#[doc = "UARTPCellID2 Register"]
330pub mod uartpcellid2;
331#[doc = "UARTPCELLID3 (r) register accessor: UARTPCellID3 Register  
332
333You can [`read`](crate::generic::Reg::read) this register and get [`uartpcellid3::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).  
334
335For information about available fields see [`mod@uartpcellid3`]
336module"]
337pub type UARTPCELLID3 = crate::Reg<uartpcellid3::UARTPCELLID3_SPEC>;
338#[doc = "UARTPCellID3 Register"]
339pub mod uartpcellid3;
rp2040_pac/uart0.rs

rp2040_pac/
uart0.rs
