rp2040_pac/xosc/
ctrl.rs

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1#[doc = "Register `CTRL` reader"]
2pub type R = crate::R<CTRL_SPEC>;
3#[doc = "Register `CTRL` writer"]
4pub type W = crate::W<CTRL_SPEC>;
5#[doc = "Field `FREQ_RANGE` reader - Frequency range. This resets to 0xAA0 and cannot be changed."]
6pub type FREQ_RANGE_R = crate::FieldReader<FREQ_RANGE_A>;
7#[doc = "Frequency range. This resets to 0xAA0 and cannot be changed.  
8
9Value on reset: 0"]
10#[derive(Clone, Copy, Debug, PartialEq, Eq)]
11#[repr(u16)]
12pub enum FREQ_RANGE_A {
13    #[doc = "2720: `101010100000`"]
14    _1_15MHZ = 2720,
15    #[doc = "2721: `101010100001`"]
16    RESERVED_1 = 2721,
17    #[doc = "2722: `101010100010`"]
18    RESERVED_2 = 2722,
19    #[doc = "2723: `101010100011`"]
20    RESERVED_3 = 2723,
21}
22impl From<FREQ_RANGE_A> for u16 {
23    #[inline(always)]
24    fn from(variant: FREQ_RANGE_A) -> Self {
25        variant as _
26    }
27}
28impl crate::FieldSpec for FREQ_RANGE_A {
29    type Ux = u16;
30}
31impl FREQ_RANGE_R {
32    #[doc = "Get enumerated values variant"]
33    #[inline(always)]
34    pub const fn variant(&self) -> Option<FREQ_RANGE_A> {
35        match self.bits {
36            2720 => Some(FREQ_RANGE_A::_1_15MHZ),
37            2721 => Some(FREQ_RANGE_A::RESERVED_1),
38            2722 => Some(FREQ_RANGE_A::RESERVED_2),
39            2723 => Some(FREQ_RANGE_A::RESERVED_3),
40            _ => None,
41        }
42    }
43    #[doc = "`101010100000`"]
44    #[inline(always)]
45    pub fn is_1_15mhz(&self) -> bool {
46        *self == FREQ_RANGE_A::_1_15MHZ
47    }
48    #[doc = "`101010100001`"]
49    #[inline(always)]
50    pub fn is_reserved_1(&self) -> bool {
51        *self == FREQ_RANGE_A::RESERVED_1
52    }
53    #[doc = "`101010100010`"]
54    #[inline(always)]
55    pub fn is_reserved_2(&self) -> bool {
56        *self == FREQ_RANGE_A::RESERVED_2
57    }
58    #[doc = "`101010100011`"]
59    #[inline(always)]
60    pub fn is_reserved_3(&self) -> bool {
61        *self == FREQ_RANGE_A::RESERVED_3
62    }
63}
64#[doc = "Field `FREQ_RANGE` writer - Frequency range. This resets to 0xAA0 and cannot be changed."]
65pub type FREQ_RANGE_W<'a, REG> = crate::FieldWriter<'a, REG, 12, FREQ_RANGE_A>;
66impl<'a, REG> FREQ_RANGE_W<'a, REG>
67where
68    REG: crate::Writable + crate::RegisterSpec,
69    REG::Ux: From<u16>,
70{
71    #[doc = "`101010100000`"]
72    #[inline(always)]
73    pub fn _1_15mhz(self) -> &'a mut crate::W<REG> {
74        self.variant(FREQ_RANGE_A::_1_15MHZ)
75    }
76    #[doc = "`101010100001`"]
77    #[inline(always)]
78    pub fn reserved_1(self) -> &'a mut crate::W<REG> {
79        self.variant(FREQ_RANGE_A::RESERVED_1)
80    }
81    #[doc = "`101010100010`"]
82    #[inline(always)]
83    pub fn reserved_2(self) -> &'a mut crate::W<REG> {
84        self.variant(FREQ_RANGE_A::RESERVED_2)
85    }
86    #[doc = "`101010100011`"]
87    #[inline(always)]
88    pub fn reserved_3(self) -> &'a mut crate::W<REG> {
89        self.variant(FREQ_RANGE_A::RESERVED_3)
90    }
91}
92#[doc = "Field `ENABLE` reader - On power-up this field is initialised to DISABLE and the chip runs from the ROSC.  
93 If the chip has subsequently been programmed to run from the XOSC then setting this field to DISABLE may lock-up the chip. If this is a concern then run the clk_ref from the ROSC and enable the clk_sys RESUS feature.  
94 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator."]
95pub type ENABLE_R = crate::FieldReader<ENABLE_A>;
96#[doc = "On power-up this field is initialised to DISABLE and the chip runs from the ROSC.  
97 If the chip has subsequently been programmed to run from the XOSC then setting this field to DISABLE may lock-up the chip. If this is a concern then run the clk_ref from the ROSC and enable the clk_sys RESUS feature.  
98 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator.  
99
100Value on reset: 0"]
101#[derive(Clone, Copy, Debug, PartialEq, Eq)]
102#[repr(u16)]
103pub enum ENABLE_A {
104    #[doc = "3358: `110100011110`"]
105    DISABLE = 3358,
106    #[doc = "4011: `111110101011`"]
107    ENABLE = 4011,
108}
109impl From<ENABLE_A> for u16 {
110    #[inline(always)]
111    fn from(variant: ENABLE_A) -> Self {
112        variant as _
113    }
114}
115impl crate::FieldSpec for ENABLE_A {
116    type Ux = u16;
117}
118impl ENABLE_R {
119    #[doc = "Get enumerated values variant"]
120    #[inline(always)]
121    pub const fn variant(&self) -> Option<ENABLE_A> {
122        match self.bits {
123            3358 => Some(ENABLE_A::DISABLE),
124            4011 => Some(ENABLE_A::ENABLE),
125            _ => None,
126        }
127    }
128    #[doc = "`110100011110`"]
129    #[inline(always)]
130    pub fn is_disable(&self) -> bool {
131        *self == ENABLE_A::DISABLE
132    }
133    #[doc = "`111110101011`"]
134    #[inline(always)]
135    pub fn is_enable(&self) -> bool {
136        *self == ENABLE_A::ENABLE
137    }
138}
139#[doc = "Field `ENABLE` writer - On power-up this field is initialised to DISABLE and the chip runs from the ROSC.  
140 If the chip has subsequently been programmed to run from the XOSC then setting this field to DISABLE may lock-up the chip. If this is a concern then run the clk_ref from the ROSC and enable the clk_sys RESUS feature.  
141 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator."]
142pub type ENABLE_W<'a, REG> = crate::FieldWriter<'a, REG, 12, ENABLE_A>;
143impl<'a, REG> ENABLE_W<'a, REG>
144where
145    REG: crate::Writable + crate::RegisterSpec,
146    REG::Ux: From<u16>,
147{
148    #[doc = "`110100011110`"]
149    #[inline(always)]
150    pub fn disable(self) -> &'a mut crate::W<REG> {
151        self.variant(ENABLE_A::DISABLE)
152    }
153    #[doc = "`111110101011`"]
154    #[inline(always)]
155    pub fn enable(self) -> &'a mut crate::W<REG> {
156        self.variant(ENABLE_A::ENABLE)
157    }
158}
159impl R {
160    #[doc = "Bits 0:11 - Frequency range. This resets to 0xAA0 and cannot be changed."]
161    #[inline(always)]
162    pub fn freq_range(&self) -> FREQ_RANGE_R {
163        FREQ_RANGE_R::new((self.bits & 0x0fff) as u16)
164    }
165    #[doc = "Bits 12:23 - On power-up this field is initialised to DISABLE and the chip runs from the ROSC.  
166 If the chip has subsequently been programmed to run from the XOSC then setting this field to DISABLE may lock-up the chip. If this is a concern then run the clk_ref from the ROSC and enable the clk_sys RESUS feature.  
167 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator."]
168    #[inline(always)]
169    pub fn enable(&self) -> ENABLE_R {
170        ENABLE_R::new(((self.bits >> 12) & 0x0fff) as u16)
171    }
172}
173impl W {
174    #[doc = "Bits 0:11 - Frequency range. This resets to 0xAA0 and cannot be changed."]
175    #[inline(always)]
176    #[must_use]
177    pub fn freq_range(&mut self) -> FREQ_RANGE_W<CTRL_SPEC> {
178        FREQ_RANGE_W::new(self, 0)
179    }
180    #[doc = "Bits 12:23 - On power-up this field is initialised to DISABLE and the chip runs from the ROSC.  
181 If the chip has subsequently been programmed to run from the XOSC then setting this field to DISABLE may lock-up the chip. If this is a concern then run the clk_ref from the ROSC and enable the clk_sys RESUS feature.  
182 The 12-bit code is intended to give some protection against accidental writes. An invalid setting will enable the oscillator."]
183    #[inline(always)]
184    #[must_use]
185    pub fn enable(&mut self) -> ENABLE_W<CTRL_SPEC> {
186        ENABLE_W::new(self, 12)
187    }
188    #[doc = r" Writes raw bits to the register."]
189    #[doc = r""]
190    #[doc = r" # Safety"]
191    #[doc = r""]
192    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
193    #[inline(always)]
194    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
195        self.bits = bits;
196        self
197    }
198}
199#[doc = "Crystal Oscillator Control  
200
201You can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
202pub struct CTRL_SPEC;
203impl crate::RegisterSpec for CTRL_SPEC {
204    type Ux = u32;
205}
206#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
207impl crate::Readable for CTRL_SPEC {}
208#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
209impl crate::Writable for CTRL_SPEC {
210    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
211    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
212}
213#[doc = "`reset()` method sets CTRL to value 0"]
214impl crate::Resettable for CTRL_SPEC {
215    const RESET_VALUE: u32 = 0;
216}
rp2040_pac/xosc/ctrl.rs

rp2040_pac/xosc/
ctrl.rs
