rp2040_pac/xip_ssi/
rxuicr.rs

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1#[doc = "Register `RXUICR` reader"]
2pub type R = crate::R<RXUICR_SPEC>;
3#[doc = "Field `RXUICR` reader - Clear-on-read receive FIFO underflow interrupt"]
4pub type RXUICR_R = crate::BitReader;
5impl R {
6    #[doc = "Bit 0 - Clear-on-read receive FIFO underflow interrupt"]
7    #[inline(always)]
8    pub fn rxuicr(&self) -> RXUICR_R {
9        RXUICR_R::new((self.bits & 1) != 0)
10    }
11}
12#[doc = "RX FIFO underflow interrupt clear  
13
14You can [`read`](crate::generic::Reg::read) this register and get [`rxuicr::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
15pub struct RXUICR_SPEC;
16impl crate::RegisterSpec for RXUICR_SPEC {
17    type Ux = u32;
18}
19#[doc = "`read()` method returns [`rxuicr::R`](R) reader structure"]
20impl crate::Readable for RXUICR_SPEC {}
21#[doc = "`reset()` method sets RXUICR to value 0"]
22impl crate::Resettable for RXUICR_SPEC {
23    const RESET_VALUE: u32 = 0;
24}
rp2040_pac/xip_ssi/rxuicr.rs

rp2040_pac/xip_ssi/
rxuicr.rs
