rp2040_pac/dma/
ints0.rs

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1#[doc = "Register `INTS0` reader"]
2pub type R = crate::R<INTS0_SPEC>;
3#[doc = "Register `INTS0` writer"]
4pub type W = crate::W<INTS0_SPEC>;
5#[doc = "Field `INTS0` reader - Indicates active channel interrupt requests which are currently causing IRQ 0 to be asserted.  
6 Channel interrupts can be cleared by writing a bit mask here."]
7pub type INTS0_R = crate::FieldReader<u16>;
8#[doc = "Field `INTS0` writer - Indicates active channel interrupt requests which are currently causing IRQ 0 to be asserted.  
9 Channel interrupts can be cleared by writing a bit mask here."]
10pub type INTS0_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
11impl R {
12    #[doc = "Bits 0:15 - Indicates active channel interrupt requests which are currently causing IRQ 0 to be asserted.  
13 Channel interrupts can be cleared by writing a bit mask here."]
14    #[inline(always)]
15    pub fn ints0(&self) -> INTS0_R {
16        INTS0_R::new((self.bits & 0xffff) as u16)
17    }
18}
19impl W {
20    #[doc = "Bits 0:15 - Indicates active channel interrupt requests which are currently causing IRQ 0 to be asserted.  
21 Channel interrupts can be cleared by writing a bit mask here."]
22    #[inline(always)]
23    #[must_use]
24    pub fn ints0(&mut self) -> INTS0_W<INTS0_SPEC> {
25        INTS0_W::new(self, 0)
26    }
27    #[doc = r" Writes raw bits to the register."]
28    #[doc = r""]
29    #[doc = r" # Safety"]
30    #[doc = r""]
31    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
32    #[inline(always)]
33    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
34        self.bits = bits;
35        self
36    }
37}
38#[doc = "Interrupt Status for IRQ 0  
39
40You can [`read`](crate::generic::Reg::read) this register and get [`ints0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ints0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
41pub struct INTS0_SPEC;
42impl crate::RegisterSpec for INTS0_SPEC {
43    type Ux = u32;
44}
45#[doc = "`read()` method returns [`ints0::R`](R) reader structure"]
46impl crate::Readable for INTS0_SPEC {}
47#[doc = "`write(|w| ..)` method takes [`ints0::W`](W) writer structure"]
48impl crate::Writable for INTS0_SPEC {
49    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
50    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0xffff;
51}
52#[doc = "`reset()` method sets INTS0 to value 0"]
53impl crate::Resettable for INTS0_SPEC {
54    const RESET_VALUE: u32 = 0;
55}
rp2040_pac/dma/ints0.rs

rp2040_pac/dma/
ints0.rs
